From: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
To: ville.syrjala@linux.intel.com, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 4/9] drm/i915: Refactor VLV display power well init/deinit
Date: Fri, 10 Jul 2015 16:52:20 +0530 [thread overview]
Message-ID: <559FAAEC.2050801@intel.com> (raw)
In-Reply-To: <1435580756-20154-5-git-send-email-ville.syrjala@linux.intel.com>
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Reviewed-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
On 6/29/2015 5:55 PM, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> We do the exact same steps around the disp2d/pipe A power well
> enable/disable on VLV and CHV. Refactor the shared code into
> some helpers.
>
> Note that this means we now call vlv_power_sequencer_reset() before
> turning off the power well, whereas before we did it after. That
> doesn't matter though since vlv_power_sequencer_reset() just resets
> the power sequencer software tracking and doesn't touch the hardware
> at all.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_runtime_pm.c | 52 +++++++++++++++------------------
> 1 file changed, 23 insertions(+), 29 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
> index 1bd947a..6393b76 100644
> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> @@ -835,12 +835,8 @@ static bool vlv_power_well_enabled(struct drm_i915_private *dev_priv,
> return enabled;
> }
>
> -static void vlv_display_power_well_enable(struct drm_i915_private *dev_priv,
> - struct i915_power_well *power_well)
> +static void vlv_display_power_well_init(struct drm_i915_private *dev_priv)
> {
> - WARN_ON_ONCE(power_well->data != PUNIT_POWER_WELL_DISP2D);
> -
> - vlv_set_power_well(dev_priv, power_well, true);
>
> spin_lock_irq(&dev_priv->irq_lock);
> valleyview_enable_display_irqs(dev_priv);
> @@ -858,18 +854,33 @@ static void vlv_display_power_well_enable(struct drm_i915_private *dev_priv,
> i915_redisable_vga_power_on(dev_priv->dev);
> }
>
> +static void vlv_display_power_well_deinit(struct drm_i915_private *dev_priv)
> +{
> + spin_lock_irq(&dev_priv->irq_lock);
> + valleyview_disable_display_irqs(dev_priv);
> + spin_unlock_irq(&dev_priv->irq_lock);
> +
> + vlv_power_sequencer_reset(dev_priv);
> +}
> +
> +static void vlv_display_power_well_enable(struct drm_i915_private *dev_priv,
> + struct i915_power_well *power_well)
> +{
> + WARN_ON_ONCE(power_well->data != PUNIT_POWER_WELL_DISP2D);
> +
> + vlv_set_power_well(dev_priv, power_well, true);
> +
> + vlv_display_power_well_init(dev_priv);
> +}
> +
> static void vlv_display_power_well_disable(struct drm_i915_private *dev_priv,
> struct i915_power_well *power_well)
> {
> WARN_ON_ONCE(power_well->data != PUNIT_POWER_WELL_DISP2D);
>
> - spin_lock_irq(&dev_priv->irq_lock);
> - valleyview_disable_display_irqs(dev_priv);
> - spin_unlock_irq(&dev_priv->irq_lock);
> + vlv_display_power_well_deinit(dev_priv);
>
> vlv_set_power_well(dev_priv, power_well, false);
> -
> - vlv_power_sequencer_reset(dev_priv);
> }
>
> static void vlv_dpio_cmn_power_well_enable(struct drm_i915_private *dev_priv,
> @@ -1054,20 +1065,7 @@ static void chv_pipe_power_well_enable(struct drm_i915_private *dev_priv,
>
> chv_set_pipe_power_well(dev_priv, power_well, true);
>
> - spin_lock_irq(&dev_priv->irq_lock);
> - valleyview_enable_display_irqs(dev_priv);
> - spin_unlock_irq(&dev_priv->irq_lock);
> -
> - /*
> - * During driver initialization/resume we can avoid restoring the
> - * part of the HW/SW state that will be inited anyway explicitly.
> - */
> - if (dev_priv->power_domains.initializing)
> - return;
> -
> - intel_hpd_init(dev_priv);
> -
> - i915_redisable_vga_power_on(dev_priv->dev);
> + vlv_display_power_well_init(dev_priv);
> }
>
> static void chv_pipe_power_well_disable(struct drm_i915_private *dev_priv,
> @@ -1075,13 +1073,9 @@ static void chv_pipe_power_well_disable(struct drm_i915_private *dev_priv,
> {
> WARN_ON_ONCE(power_well->data != PIPE_A);
>
> - spin_lock_irq(&dev_priv->irq_lock);
> - valleyview_disable_display_irqs(dev_priv);
> - spin_unlock_irq(&dev_priv->irq_lock);
> + vlv_display_power_well_deinit(dev_priv);
>
> chv_set_pipe_power_well(dev_priv, power_well, false);
> -
> - vlv_power_sequencer_reset(dev_priv);
> }
>
> /**
--
regards,
Sivakumar
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next prev parent reply other threads:[~2015-07-10 11:22 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-29 12:25 [PATCH 0/9] drm/i915: VLV/CHV DPLL workarounds and cleanups ville.syrjala
2015-06-29 12:25 ` [PATCH 1/9] drm/i915: Keep GMCH DPLL VGA mode always disabled ville.syrjala
2015-06-29 14:16 ` Sivakumar Thulasimani
2015-06-29 14:31 ` Ville Syrjälä
2015-06-29 12:25 ` [PATCH 2/9] drm/i915: Apply OCD to VLV/CHV DPLL defines ville.syrjala
2015-06-29 14:21 ` Sivakumar Thulasimani
2015-06-29 12:25 ` [PATCH 3/9] drm/i915: Simplify CHV pipe A power well code ville.syrjala
2015-07-10 11:13 ` Sivakumar Thulasimani
2015-06-29 12:25 ` [PATCH 4/9] drm/i915: Refactor VLV display power well init/deinit ville.syrjala
2015-07-10 11:22 ` Sivakumar Thulasimani [this message]
2015-06-29 12:25 ` [PATCH 5/9] drm/i915: Clear out DPLL state from pipe config in DSI get config ville.syrjala
2015-06-29 16:42 ` Daniel Vetter
2015-06-29 16:56 ` Ville Syrjälä
2015-06-29 17:08 ` Ville Syrjälä
2015-06-30 10:13 ` Daniel Vetter
2015-06-30 11:50 ` Ville Syrjälä
2015-07-01 12:42 ` Daniel Vetter
2015-07-10 12:07 ` Sivakumar Thulasimani
2015-07-13 8:51 ` Daniel Vetter
2015-07-13 10:19 ` Sivakumar Thulasimani
2015-07-13 14:39 ` Daniel Vetter
2015-07-10 11:45 ` Sivakumar Thulasimani
2015-06-29 12:25 ` [PATCH 6/9] drm/i915: Move DPLL ref/cri/VGA mode frobbing to the disp2d well enable ville.syrjala
2015-07-10 12:33 ` Sivakumar Thulasimani
2015-08-26 12:34 ` Daniel Vetter
2015-06-29 12:25 ` [PATCH 7/9] drm/i915: Make {vlv, chv}_{disable, update}_pll() more similar ville.syrjala
2015-06-29 12:25 ` [PATCH 8/9] drm/i915: Implement WaPixelRepeatModeFixForC0:chv ville.syrjala
2015-07-13 6:14 ` Sivakumar Thulasimani
2015-08-10 16:01 ` Ville Syrjälä
2015-06-29 12:25 ` [PATCH 9/9] drm/i915: Disable DSI PLL before reconfiguring it ville.syrjala
2015-07-13 6:17 ` Sivakumar Thulasimani
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