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From: Hans Verkuil <hverkuil@xs4all.nl>
To: Daniel Vetter <daniel@ffwll.ch>,
	Damien Lespiau <damien.lespiau@intel.com>
Cc: annie.j.matheson@intel.com, jesse.barnes@intel.com,
	intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org,
	vijay.a.purushothaman@intel.com, dhanya.p.r@intel.com,
	daniel.vetter@intel.com
Subject: Re: [PATCH v2 00/10] Color Manager Implementation
Date: Mon, 13 Jul 2015 10:29:32 +0200	[thread overview]
Message-ID: <55A376EC.8060807@xs4all.nl> (raw)
In-Reply-To: <20150615065310.GC8341@phenom.ffwll.local>

On 06/15/2015 08:53 AM, Daniel Vetter wrote:
> On Tue, Jun 09, 2015 at 01:50:48PM +0100, Damien Lespiau wrote:
>> On Thu, Jun 04, 2015 at 07:12:31PM +0530, Kausal Malladi wrote:
>>> From: Kausal Malladi <Kausal.Malladi@intel.com>
>>>
>>> This patch set adds color manager implementation in drm/i915 layer.
>>> Color Manager is an extension in i915 driver to support color 
>>> correction/enhancement. Various Intel platforms support several
>>> color correction capabilities. Color Manager provides abstraction
>>> of these properties and allows a user space UI agent to 
>>> correct/enhance the display.
>>
>> So I did a first rough pass on the API itself. The big question that
>> isn't solved at the moment is: do we want to try to do generic KMS
>> properties for pre-LUT + matrix + post-LUT or not. "Generic" has 3 levels:
>>
>>   1/ Generic for all KMS drivers
>>   2/ Generic for i915 supported platfoms
>>   3/ Specific to each platform
>>
>> At this point, I'm quite tempted to say we should give 1/ a shot. We
>> should be able to have pre-LUT + matrix + post-LUT on CRTC objects and
>> guarantee that, when the drivers expose such properties, user space can
>> at least give 8 bits LUT + 3x3 matrix + 8 bits LUT.
>>
>> It may be possible to use the "try" version of the atomic ioctl to
>> explore the space of possibilities from a generic user space to use
>> bigger LUTs as well. A HAL layer (which is already there in some but not
>> all OSes) would still be able to use those generic properties to load
>> "precision optimized" LUTs with some knowledge of the hardware.
> 
> Yeah, imo 1/ should be doable. For the matrix we should be able to be
> fully generic with a 16.16 format. For gamma one option would be to have

I know I am late replying, apologies for that.

I've been working on CSC support for V4L2 as well (still work in progress)
and I would like to at least end up with the same low-level fixed point
format as DRM so we can share matrix/vector calculations.

Based on my experiences I have concerns about the 16.16 format: the precision
is quite low which can be a problem when such values are used in matrix
multiplications.

In addition, while the precision may be sufficient for 8 bit color component
values, I'm pretty sure it will be insufficient when dealing with 12 or 16 bit
color components.

In earlier versions of my CSC code I used a 12.20 format, but in the latest I
switched to 32.32. This fits nicely in a u64 and it's easy to extract the
integer and fractional parts.

If this is going to be a generic and future proof API, then my suggestion
would be to increase the precision of the underlying data type.

Regards,

	Hans

> an enum property listing all the supported gamma table formats, of which
> 8bit 256 entry (the current standard) would be a one. This enum space
> would need to be drm-wide ofc. Then the gamma blob would just contain the
> table. This way we can allow funky stuff like the 1025th entry for 1.0+
> values some intel tables have, and similar things.
> 
> Wrt pre-post and plan/crtc I guess we'd just add the properties to all the
> objects where they're possible on a given platform and then the driver
> must check if there's constraints (e.g. post-lut gamma only on 1 plane or
> the crtc or similar stuff).
> 
> Also there's the legacy gamma ioctl. That should forward to the crtc gamma
> (and there probably pick post lut and pre-lut only if there's no post
> lut). For names I'd suggest
> 
> "pre-gamma-type", "pre-gamma-data", "post-gamma-type" and
> "post-gamma-data" but I don't care terrible much about them.
> -Daniel
> 
>>
>> Option 3/ is, IMHO, a no-go, we should really try hard to limit the work
>> we need to do per-platform, which means defining a common format for the
>> values we give to the kernel. As stated in various places, 16.16 seems
>> the format of choice, even for the LUTs as we have wide gamut support in
>> some of the LUTs where we can map values > 1.0 to other values > 1.0.
>>
>> Another thing, the documentation of the interface needs to be a bit more
>> crisp. For instance, we don't currently define the order in which the
>> CSC and LUT transforms of this patch set are applied: is this a de-gamma
>> LUT to do the CSC in linear space? but then that means the display is
>> linear, oops. So it must be a post-CSC lut, but then we don't de-gamma
>> sRGB (not technically a single gamma power curve for sRGB, but details,
>> details) before applying a linear transform. So with this interface, we
>> have to enforce the fbs are linear, losing dynamic range. I'm sure later
>> patches would expose more properties, but as a stand-alone patch set, it
>> would seem we can't do anything useful?
>>
>> -- 
>> Damien
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2015-07-13  8:29 UTC|newest]

Thread overview: 53+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <1433425361-17864-1-git-send-email-Kausal.Malladi@intel.com>
2015-06-05  4:01 ` [PATCH v2 00/10] Color Manager Implementation Jindal, Sonika
2015-06-05  9:28   ` Malladi, Kausal
     [not found] ` <1433425361-17864-2-git-send-email-Kausal.Malladi@intel.com>
2015-06-06  1:00   ` [PATCH v2 01/10] drm/i915: Initialize Color Manager Matt Roper
2015-06-06 11:42     ` Sharma, Shashank
2015-06-09 10:34   ` Damien Lespiau
2015-06-09 14:26     ` Damien Lespiau
     [not found] ` <1433425361-17864-6-git-send-email-Kausal.Malladi@intel.com>
2015-06-06  1:00   ` [PATCH v2 05/10] drm: Add a new function for updating color blob Matt Roper
2015-06-06 11:54     ` Sharma, Shashank
2015-06-09  0:53       ` Matt Roper
     [not found] ` <1433425361-17864-7-git-send-email-Kausal.Malladi@intel.com>
2015-06-06  1:01   ` [PATCH v2 06/10] drm: Avoid atomic commit path for CRTC property (Gamma) Matt Roper
2015-06-06 12:04     ` Sharma, Shashank
2015-06-09  0:58       ` Matt Roper
2015-06-19 22:50         ` [Intel-gfx] " Matt Roper
2015-06-24 15:40           ` Malladi, Kausal
2015-06-24 21:37             ` Matheson, Annie J
2015-06-09 10:11 ` [PATCH v2 00/10] Color Manager Implementation Damien Lespiau
2015-06-11  7:57   ` Malladi, Kausal
2015-06-11  9:04     ` Jani Nikula
     [not found] ` <1433425361-17864-3-git-send-email-Kausal.Malladi@intel.com>
2015-06-09 10:54   ` [PATCH v2 02/10] drm/i915: Attach color properties to CRTC Damien Lespiau
     [not found] ` <1433425361-17864-5-git-send-email-Kausal.Malladi@intel.com>
2015-06-05 12:00   ` [PATCH v2 04/10] drm: Add Gamma correction structure Jindal, Sonika
2015-06-05 12:25     ` Malladi, Kausal
2015-06-12 17:17     ` Emil Velikov
2015-06-14  9:02       ` Sharma, Shashank
2015-06-18 15:00         ` Emil Velikov
2015-06-06  1:00   ` Matt Roper
2015-06-06 11:51     ` Sharma, Shashank
2015-06-09  0:48       ` Matt Roper
2015-06-09 11:06   ` Damien Lespiau
     [not found] ` <1433425361-17864-9-git-send-email-Kausal.Malladi@intel.com>
2015-06-09 11:53   ` [PATCH v2 08/10] drm: Add CSC " Damien Lespiau
2015-06-09 14:58   ` Damien Lespiau
     [not found] ` <1433425361-17864-11-git-send-email-Kausal.Malladi@intel.com>
2015-06-09 11:55   ` [PATCH v2 10/10] drm/i915: Add CSC support for CHV/BSW Damien Lespiau
2015-06-09 12:50 ` [PATCH v2 00/10] Color Manager Implementation Damien Lespiau
2015-06-15  6:53   ` [Intel-gfx] " Daniel Vetter
2015-06-15 20:30     ` Matheson, Annie J
2015-06-16  3:12       ` Sharma, Shashank
2015-06-16 22:10         ` Matheson, Annie J
2015-07-13  8:29     ` Hans Verkuil [this message]
2015-07-13  9:18       ` Daniel Vetter
2015-07-13  9:43         ` [Intel-gfx] " Hans Verkuil
2015-07-13  9:54           ` Daniel Vetter
2015-07-13 10:11             ` Hans Verkuil
2015-07-13 14:07               ` [Intel-gfx] " Daniel Vetter
2015-07-14  8:17                 ` Hans Verkuil
2015-07-14  9:11                   ` Daniel Vetter
2015-07-14  9:35                     ` Hans Verkuil
2015-07-14 10:16                       ` [Intel-gfx] " Daniel Vetter
2015-07-15 12:35                         ` Hans Verkuil
2015-07-15 13:28                           ` [Intel-gfx] " Hans Verkuil
     [not found] ` <1433425361-17864-8-git-send-email-Kausal.Malladi@intel.com>
2015-06-06  5:33   ` [PATCH v2 07/10] drm/i915: Add pipe level Gamma correction for CHV/BSW Jindal, Sonika
2015-06-06 12:09     ` Sharma, Shashank
2015-06-09 11:23       ` Damien Lespiau
2015-06-09 11:51   ` Damien Lespiau
2015-06-09 14:15   ` Damien Lespiau

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