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diff for duplicates of <55A3B848.2080205@nvidia.com>

diff --git a/a/1.txt b/N1/1.txt
index b163b5f..fc71316 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -5,7 +5,7 @@ On 03/06/15 12:44, Jon Hunter wrote:
 >> Add the device-tree DFLL clock node and CPU regulator phandle for
 >> tegra124 chromebooks to enable CPUFreq support on these boards.
 >>
->> Signed-off-by: Jon Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
+>> Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
 >>
 >> ---
 >> This has been tested on a tegra124 nyan-big by using the userspace
@@ -36,21 +36,21 @@ On 03/06/15 12:44, Jon Hunter wrote:
 >>  	};
 >>  
 >> +	/* CPU DFLL clock */
->> +	clock@0,70110000 {
+>> +	clock at 0,70110000 {
 >> +		status = "okay";
 >> +		vdd-cpu-supply = <&vdd_cpu>;
 >> +		nvidia,i2c-fs-rate = <400000>;
 >> +	};
 >> +
->>  	ahub@0,70300000 {
->>  		i2s@0,70301100 {
+>>  	ahub at 0,70300000 {
+>>  		i2s at 0,70301100 {
 >>  			status = "okay";
 >> @@ -487,6 +494,12 @@
 >>  		};
 >>  	};
 >>  
 >> +	cpus {
->> +		cpu@0 {
+>> +		cpu at 0 {
 >> +			vdd-cpu-supply = <&vdd_cpu>;
 >> +		};
 >> +	};
diff --git a/a/content_digest b/N1/content_digest
index 709a76d..3f829ef 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,15 +1,9 @@
  "ref\01433331821-9648-1-git-send-email-jonathanh@nvidia.com\0"
  "ref\0556EE8B0.2060205@nvidia.com\0"
- "ref\0556EE8B0.2060205-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org\0"
- "From\0Jon Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\0"
- "Subject\0Re: [PATCH] ARM: tegra: Enable CPUFreq support for Tegra124 Chromebooks\0"
+ "From\0jonathanh@nvidia.com (Jon Hunter)\0"
+ "Subject\0[PATCH] ARM: tegra: Enable CPUFreq support for Tegra124 Chromebooks\0"
  "Date\0Mon, 13 Jul 2015 14:08:24 +0100\0"
- "To\0Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>"
-  Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
- " Alexandre Courbot <gnurou-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\0"
- "Cc\0linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
-  linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>
- " Paul Walmsley <pwalmsley-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\0"
+ "To\0linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
  "On 03/06/15 12:44, Jon Hunter wrote:\n"
@@ -19,7 +13,7 @@
  ">> Add the device-tree DFLL clock node and CPU regulator phandle for\n"
  ">> tegra124 chromebooks to enable CPUFreq support on these boards.\n"
  ">>\n"
- ">> Signed-off-by: Jon Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n"
+ ">> Signed-off-by: Jon Hunter <jonathanh@nvidia.com>\n"
  ">>\n"
  ">> ---\n"
  ">> This has been tested on a tegra124 nyan-big by using the userspace\n"
@@ -50,21 +44,21 @@
  ">>  \t};\n"
  ">>  \n"
  ">> +\t/* CPU DFLL clock */\n"
- ">> +\tclock@0,70110000 {\n"
+ ">> +\tclock at 0,70110000 {\n"
  ">> +\t\tstatus = \"okay\";\n"
  ">> +\t\tvdd-cpu-supply = <&vdd_cpu>;\n"
  ">> +\t\tnvidia,i2c-fs-rate = <400000>;\n"
  ">> +\t};\n"
  ">> +\n"
- ">>  \tahub@0,70300000 {\n"
- ">>  \t\ti2s@0,70301100 {\n"
+ ">>  \tahub at 0,70300000 {\n"
+ ">>  \t\ti2s at 0,70301100 {\n"
  ">>  \t\t\tstatus = \"okay\";\n"
  ">> @@ -487,6 +494,12 @@\n"
  ">>  \t\t};\n"
  ">>  \t};\n"
  ">>  \n"
  ">> +\tcpus {\n"
- ">> +\t\tcpu@0 {\n"
+ ">> +\t\tcpu at 0 {\n"
  ">> +\t\t\tvdd-cpu-supply = <&vdd_cpu>;\n"
  ">> +\t\t};\n"
  ">> +\t};\n"
@@ -78,4 +72,4 @@
  "\n"
  Jon
 
-76cadd56deac60673c91a8d36c75b8072484dc911bb68b5fb94e41e6ce63fc74
+9c35e301cdb68955c34d0f6348d546bc8243e778ff34d6cf167914ec6e2173c9

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