All of lore.kernel.org
 help / color / mirror / Atom feed
From: David Daney <ddaney.cavm@gmail.com>
To: Thomas Gleixner <tglx@linutronix.de>
Cc: LKML <linux-kernel@vger.kernel.org>,
	Ralf Baechle <ralf@linux-mips.org>,
	Jiang Liu <jiang.liu@linux.intel.com>,
	linux-mips@linux-mips.org, David Daney <david.daney@cavium.com>
Subject: Re: [patch 10/12] MIPS/cavium/octeon: Replace the homebrewn flow handler
Date: Wed, 15 Jul 2015 14:19:53 -0700	[thread overview]
Message-ID: <55A6CE79.9020502@gmail.com> (raw)
In-Reply-To: <20150713200715.290025879@linutronix.de>

On 07/13/2015 01:46 PM, Thomas Gleixner wrote:
> The gpio interrupt handling of octeon contains a homebrewn flow
> handler which calls either handle_level_irq or handle_edge_irq
> depending on the trigger type. Thats an extra conditional and call in
> the interrupt handling path. The proper way to handle different types
> and therefor different flows is to update the handler in the
> irq_set_type() callback.
>
> Remove the extra indirection and add the handler update to
> octeon_irq_ciu_gpio_set_type(). At mapping time it defaults to
> handle_level_irq which gets updated if the device tree contains a
> different trigger type.
>
> Signed-off-by: Thomas Gleixner<tglx@linutronix.de>

This looks sane, not tested, but ...

Acked-by: David Daney <david.daney@cavium.com>



> Cc: Ralf Baechle<ralf@linux-mips.org>
> Cc: David Daney<david.daney@cavium.com>
> Cc: Jiang Liu<jiang.liu@linux.intel.com>
> Cc:linux-mips@linux-mips.org
> ---
>   arch/mips/cavium-octeon/octeon-irq.c |   22 +++++++++++-----------
>   1 file changed, 11 insertions(+), 11 deletions(-)
>
> Index: tip/arch/mips/cavium-octeon/octeon-irq.c
> ===================================================================
> --- tip.orig/arch/mips/cavium-octeon/octeon-irq.c
> +++ tip/arch/mips/cavium-octeon/octeon-irq.c
> @@ -663,6 +663,11 @@ static int octeon_irq_ciu_gpio_set_type(
>   	irqd_set_trigger_type(data, t);
>   	octeon_irq_gpio_setup(data);
>
> +	if (irqd_get_trigger_type(data) & IRQ_TYPE_EDGE_BOTH)
> +		irq_set_handler_locked(data, handle_edge_irq);
> +	else
> +		irq_set_handler_locked(data, handle_level_irq);
> +
>   	return IRQ_SET_MASK_OK;
>   }
>
> @@ -697,16 +702,6 @@ static void octeon_irq_ciu_gpio_ack(stru
>   	cvmx_write_csr(CVMX_GPIO_INT_CLR, mask);
>   }
>
> -static void octeon_irq_handle_trigger(unsigned int irq, struct irq_desc *desc)
> -{
> -	struct irq_data *data = irq_desc_get_irq_data(desc);
> -
> -	if (irqd_get_trigger_type(data) & IRQ_TYPE_EDGE_BOTH)
> -		handle_edge_irq(irq, desc);
> -	else
> -		handle_level_irq(irq, desc);
> -}
> -
>   #ifdef CONFIG_SMP
>
>   static void octeon_irq_cpu_offline_ciu(struct irq_data *data)
> @@ -1229,8 +1224,13 @@ static int octeon_irq_gpio_map(struct ir
>   		octeon_irq_ciu_to_irq[line][bit] != 0)
>   		return -EINVAL;
>
> +	/*
> +	 * Default to handle_level_irq. If the DT contains a different
> +	 * trigger type, it will call the irq_set_type callback and
> +	 * the handler gets updated.
> +	 */
>   	r = octeon_irq_set_ciu_mapping(virq, line, bit, hw,
> -		octeon_irq_gpio_chip, octeon_irq_handle_trigger);
> +				       octeon_irq_gpio_chip, handle_level_irq);
>   	return r;
>   }
>
>
>
>
>
>

  reply	other threads:[~2015-07-15 21:20 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-07-13 20:45 [patch 00/12] MIPS: Interrupt cleanups and API change preparation Thomas Gleixner
2015-07-13 20:45 ` [patch 01/12] MIPS/jz4740: Consolidate chained IRQ handler install/remove Thomas Gleixner
2015-07-13 20:45 ` [patch 02/12] MIPS/pci-ar71xx: " Thomas Gleixner
2015-07-13 20:45 ` [patch 03/12] MIPS/pci-ar724x: " Thomas Gleixner
2015-07-13 20:45 ` [patch 04/12] MIPS/pci-rt3883: " Thomas Gleixner
2015-07-13 20:50   ` Julia Lawall
2015-07-13 21:07     ` Thomas Gleixner
2015-07-13 20:45 ` [patch 05/12] MIPS/irq: Use access helper irq_data_get_affinity_mask() Thomas Gleixner
2015-07-13 20:46 ` [patch 06/12] MIPS/alchemy: Use irq_set_chip_handler_name_locked() Thomas Gleixner
2015-07-13 20:46 ` [patch 07/12] MIPS/bcm63xx: Use irq_set_handler_locked() Thomas Gleixner
2015-07-13 20:46 ` [patch 08/12] MIPS/alchemy: Remove pointless irqdisable/enable Thomas Gleixner
2015-07-14  6:00   ` Manuel Lauss
2015-07-14  8:16     ` Thomas Gleixner
2015-07-14  8:55       ` Manuel Lauss
2015-07-14  9:02         ` Ralf Baechle
2015-07-14  9:58           ` Thomas Gleixner
2015-07-13 20:46 ` [patch 09/12] MIPS/ath91: " Thomas Gleixner
2015-07-13 20:46 ` [patch 10/12] MIPS/cavium/octeon: Replace the homebrewn flow handler Thomas Gleixner
2015-07-15 21:19   ` David Daney [this message]
2015-07-13 20:46 ` [patch 11/12] MIPS/netlogic: Prepare ipi handlers for irq argument removal Thomas Gleixner
2015-07-13 20:46 ` [patch 12/12] MIPS/PCI/rt3883: Prepare rt3883_pci_irq_handler " Thomas Gleixner

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=55A6CE79.9020502@gmail.com \
    --to=ddaney.cavm@gmail.com \
    --cc=david.daney@cavium.com \
    --cc=jiang.liu@linux.intel.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-mips@linux-mips.org \
    --cc=ralf@linux-mips.org \
    --cc=tglx@linutronix.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.