From: Richard Henderson <rth@twiddle.net>
To: Aurelien Jarno <aurelien@aurel32.net>
Cc: Paolo Bonzini <pbonzini@redhat.com>, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH v2 00/13] tcg/sparc v8plus code generation
Date: Thu, 16 Jul 2015 22:29:53 +0100 [thread overview]
Message-ID: <55A82251.6020308@twiddle.net> (raw)
In-Reply-To: <20150715205423.GA23115@aurel32.net>
On 07/15/2015 09:54 PM, Aurelien Jarno wrote:
> While I understand why we need the new trunc_shr_i32 opcode for MIPS64
> (the 32-bit values must be kept sign-extended), I currently fail to
> see why it is needed for SPARC.
As far as I recall, it improves code for extracting high parts of 64-bit
quantities. Without this, we wind up with a 64-bit shift, requiring a 64-bit
temp register, followed by the "real" truncate which can copy the data to a
32-bit destination register.
r~
next prev parent reply other threads:[~2015-07-16 21:30 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1398369715-16102-1-git-send-email-rth@twiddle.net>
2015-07-15 20:54 ` [Qemu-devel] [PATCH v2 00/13] tcg/sparc v8plus code generation Aurelien Jarno
2015-07-16 21:29 ` Richard Henderson [this message]
2015-07-17 10:23 ` Aurelien Jarno
2015-07-17 13:42 ` Aurelien Jarno
2015-07-18 7:21 ` Richard Henderson
2015-07-18 21:18 ` Aurelien Jarno
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