From: York Sun <yorksun@freescale.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] armv8/fsl-lsch3: Fix TCR_EL3 for the final MMU setup.
Date: Mon, 20 Jul 2015 14:11:27 -0700 [thread overview]
Message-ID: <55AD63FF.7030902@freescale.com> (raw)
In-Reply-To: <1435564242-23540-1-git-send-email-b18965@freescale.com>
On 06/29/2015 12:50 AM, Alison Wang wrote:
> From: Zhichun Hua <zhichun.hua@freescale.com>
>
> When final MMU table is setup in DDR, TCR attributes must match
> those of the memroy for cacheability and shareability.
>
> Signed-off-by: Zhichun Hua <zhichun.hua@freescale.com>
> Signed-off-by: York Sun <yorksun@freescale.com>
Applied to u-boot-fsl-qoriq master branch.
York
prev parent reply other threads:[~2015-07-20 21:11 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-29 7:50 [U-Boot] [PATCH] armv8/fsl-lsch3: Fix TCR_EL3 for the final MMU setup Alison Wang
2015-07-20 21:11 ` York Sun [this message]
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