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[216.31.211.11]) by smtp.googlemail.com with ESMTPSA id db1sm28766083pdb.50.2015.07.21.11.26.22 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 21 Jul 2015 11:26:23 -0700 (PDT) Message-ID: <55AE8E5D.8020700@gmail.com> Date: Tue, 21 Jul 2015 11:24:29 -0700 From: Florian Fainelli User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.7.0 MIME-Version: 1.0 To: Thomas Gleixner , Brian Norris CC: Florian Fainelli , Gregory Fong , bcm-kernel-feedback-list@broadcom.com, linux-kernel@vger.kernel.org, linux-mips@linux-mips.org, Kevin Cernekee , Jason Cooper Subject: Re: [PATCH 1/2] genirq: add chip_{suspend,resume} PM support to irq_chip References: <20150619224123.GL4917@ld-irv-0074> <1434756403-379-1-git-send-email-computersforpeace@gmail.com> In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 48366 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: f.fainelli@gmail.com Precedence: bulk List-help: List-unsubscribe: List-software: Ecartis version 1.0.0 List-Id: linux-mips X-List-ID: linux-mips List-subscribe: List-owner: List-post: List-archive: X-list: linux-mips On 20/06/15 07:11, Thomas Gleixner wrote: > On Fri, 19 Jun 2015, Brian Norris wrote: >> This patch adds a second set of suspend/resume hooks to irq_chip, this >> time to represent *chip* suspend/resume, rather than IRQ suspend/resume. >> These callbacks will always be called for an irqchip and are based on >> the per-chip irq_chip_generic struct, rather than the per-IRQ irq_data >> struct. > > There is no per-chip irq_chip_generic struct. It's only there if the > irq chip has been instantiated as a generic chip. > >> /** >> * struct irq_chip - hardware interrupt chip descriptor >> * >> @@ -317,6 +319,12 @@ static inline irq_hw_number_t irqd_to_hwirq(struct irq_data *d) >> * @irq_suspend: function called from core code on suspend once per chip >> * @irq_resume: function called from core code on resume once per chip >> * @irq_pm_shutdown: function called from core code on shutdown once per chip >> + * @chip_suspend: function called from core code on suspend once per >> + * chip; for handling chip details even when no interrupts >> + * are in use >> + * @chip_resume: function called from core code on resume once per chip; >> + * for handling chip details even when no interrupts are >> + * in use >> * @irq_calc_mask: Optional function to set irq_data.mask for special cases >> * @irq_print_chip: optional to print special chip info in show_interrupts >> * @irq_request_resources: optional to request resources before calling >> @@ -357,6 +365,8 @@ struct irq_chip { >> void (*irq_suspend)(struct irq_data *data); >> void (*irq_resume)(struct irq_data *data); >> void (*irq_pm_shutdown)(struct irq_data *data); >> + void (*chip_suspend)(struct irq_chip_generic *gc); >> + void (*chip_resume)(struct irq_chip_generic *gc); > > I really don't want to set a precedent for random (*foo)(*bar) > callbacks. > >> + >> + if (ct->chip.chip_suspend) >> + ct->chip.chip_suspend(gc); > > So wouldn't it be the more intuitive solution to make this a callback > in the struct gc itself? Brian can correct me, but his approach is more generic, if there is another irqchip driver needing a similar infrastructure, this would be already there, and directly usable. Maybe all we need to is to change the chip_suspend/resume arguments to pass a reference to irq_chip instead? I can go ahead and rewrite that part of the patch to make this is exclusively located to the irq_chip_generic structure instead. -- Florian