From mboxrd@z Thu Jan 1 00:00:00 1970 From: Mark yao Subject: Re: [PATCH v3 3/6] drm/rockchip: vop: Add yuv plane support Date: Thu, 23 Jul 2015 10:01:58 +0800 Message-ID: <55B04B16.7030005@rock-chips.com> References: <1437466807-13689-1-git-send-email-mark.yao@rock-chips.com> <1437466807-13689-4-git-send-email-mark.yao@rock-chips.com> <7451281.fUv3gEKea6@diego> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8"; Format="flowed" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <7451281.fUv3gEKea6@diego> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: =?UTF-8?B?SGVpa28gU3TDvGJuZXI=?= Cc: zwl@rock-chips.com, linux-kernel@vger.kernel.org, tfiga@chromium.org, linux-rockchip@lists.infradead.org, dri-devel@lists.freedesktop.org, xw@rock-chips.com, dkm@rock-chips.com, sandy.huang@rock-chips.com, linux-arm-kernel@lists.infradead.org List-Id: linux-rockchip.vger.kernel.org T24gMjAxNeW5tDA35pyIMjPml6UgMDU6NTEsIEhlaWtvIFN0w7xibmVyIHdyb3RlOgo+IEFtIERp ZW5zdGFnLCAyMS4gSnVsaSAyMDE1LCAxNjoyMDowNCBzY2hyaWViIE1hcmsgWWFvOgo+PiB2b3Ag c3VwcG9ydCB5dXYgd2l0aCBOVjEyLCBOVjE2IGFuZCBOVjI0LCBvbmx5IDIgcGxhbmUgeXV2Lgo+ Pgo+PiBTaWduZWQtb2ZmLWJ5OiBNYXJrIFlhbyA8bWFyay55YW9Acm9jay1jaGlwcy5jb20+Cj4+ IC0tLQo+PiBDaGFuZ2VzIGluIHYzOgo+PiBBZHZpY2VkIGJ5IFRvbWFzeiBGaWdhCj4+IC0gc2Vw YXJhdGUgZGVzdCBjYWxjdWxhdGUgdG8gYW5vdGhlciBwYXRjaAo+PiAtIGZpeCBzcmMgeDEseDIg d2hlbiBkbyBhbGlnbiwgYW5kIHJlbW92ZSB1bm5lY2Vzc2FyeSBzcmMueTEgYWxpZ24uCj4+Cj4+ IENoYW5nZXMgaW4gdjI6Cj4+IC0gVXYgYnVmZmVyIG5vdCBzdXBwb3J0IG9kZCBvZmZzZXQsIGFs aWduIGl0Lgo+PiAtIEZpeCBlcnJvciBkaXNwbGF5IHdoZW4gbW92ZSB5dXYgaW1hZ2UuCj4+Cj4+ ICAgZHJpdmVycy9ncHUvZHJtL3JvY2tjaGlwL3JvY2tjaGlwX2RybV92b3AuYyB8ICAgNTYKPj4g KysrKysrKysrKysrKysrKysrKysrKysrKystIDEgZmlsZSBjaGFuZ2VkLCA1NCBpbnNlcnRpb25z KCspLCAyCj4+IGRlbGV0aW9ucygtKQo+Pgo+PiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJt L3JvY2tjaGlwL3JvY2tjaGlwX2RybV92b3AuYwo+PiBiL2RyaXZlcnMvZ3B1L2RybS9yb2NrY2hp cC9yb2NrY2hpcF9kcm1fdm9wLmMgaW5kZXggYzdlMDI4My4uNDdjZTk0MyAxMDA2NDQKPj4gLS0t IGEvZHJpdmVycy9ncHUvZHJtL3JvY2tjaGlwL3JvY2tjaGlwX2RybV92b3AuYwo+PiArKysgYi9k cml2ZXJzL2dwdS9kcm0vcm9ja2NoaXAvcm9ja2NoaXBfZHJtX3ZvcC5jCj4+IEBAIC0zNzMsNiAr MzczLDE4IEBAIHN0YXRpYyBlbnVtIHZvcF9kYXRhX2Zvcm1hdCB2b3BfY29udmVydF9mb3JtYXQo dWludDMyX3QKPj4gZm9ybWF0KSB9Cj4+ICAgfQo+Pgo+PiArc3RhdGljIGJvb2wgaXNfeXV2X3N1 cHBvcnQodWludDMyX3QgZm9ybWF0KQo+PiArewo+PiArCXN3aXRjaCAoZm9ybWF0KSB7Cj4+ICsJ Y2FzZSBEUk1fRk9STUFUX05WMTI6Cj4+ICsJY2FzZSBEUk1fRk9STUFUX05WMTY6Cj4+ICsJY2Fz ZSBEUk1fRk9STUFUX05WMjQ6Cj4+ICsJCXJldHVybiB0cnVlOwo+PiArCWRlZmF1bHQ6Cj4+ICsJ CXJldHVybiBmYWxzZTsKPj4gKwl9Cj4+ICt9Cj4+ICsKPj4gICBzdGF0aWMgYm9vbCBpc19hbHBo YV9zdXBwb3J0KHVpbnQzMl90IGZvcm1hdCkKPj4gICB7Cj4+ICAgCXN3aXRjaCAoZm9ybWF0KSB7 Cj4+IEBAIC01NzcsMTYgKzU4OSwyMSBAQCBzdGF0aWMgaW50IHZvcF91cGRhdGVfcGxhbmVfZXZl bnQoc3RydWN0IGRybV9wbGFuZQo+Cj4gZG9lcyBub3QgYXBwbHkgdG8gd2hhdCdzIGluIG1haW5s aW5lLCBhcyB0aGlzIHBhdGNoIHNlZW1zIHRvIGlnbm9yZQo+IAk4NWEzNTlmMjUzODggKCJkcm0v cm9ja2NoaXA6IEFkZCBCR1IgZm9ybWF0cyB0byBWT1AiKQo+IGZyb20gVG9tYXN6Cj4KCkhtbSwg SSBmb3VuZCB0aGUgcGF0Y2ggKCJkcm0vcm9ja2NoaXA6IEFkZCBCR1IgZm9ybWF0cyB0byBWT1Ai KQppcyBvbiB0aGUgZHJtLWZpeGVzIGJyYW5jaCwgc28gSSBkaWRuJ3QgcmVzZW5kIHRoZSBwYXRj aC4KCk9rLCBJIHdpbGwgcmViYXNlIHRoZXNlIHBhdGNoZXMgdG9wIG9mIHRoZSAiQWRkIEJHUiBm b3JtYXRzIHRvIFZPUCIuCgoKPj4gKnBsYW5lLCBzdHJ1Y3Qgdm9wICp2b3AgPSB0b192b3AoY3J0 Yyk7Cj4+ICAgCXN0cnVjdCBkcm1fZ2VtX29iamVjdCAqb2JqOwo+PiAgIAlzdHJ1Y3Qgcm9ja2No aXBfZ2VtX29iamVjdCAqcmtfb2JqOwo+PiArCXN0cnVjdCBkcm1fZ2VtX29iamVjdCAqdXZfb2Jq Owo+PiArCXN0cnVjdCByb2NrY2hpcF9nZW1fb2JqZWN0ICpya191dl9vYmo7Cj4+ICAgCXVuc2ln bmVkIGxvbmcgb2Zmc2V0Owo+PiAgIAl1bnNpZ25lZCBpbnQgYWN0dWFsX3c7Cj4+ICAgCXVuc2ln bmVkIGludCBhY3R1YWxfaDsKPj4gICAJdW5zaWduZWQgaW50IGRzcF9zdHg7Cj4+ICAgCXVuc2ln bmVkIGludCBkc3Bfc3R5Owo+PiAgIAl1bnNpZ25lZCBpbnQgeV92aXJfc3RyaWRlOwo+PiArCXVu c2lnbmVkIGludCB1dl92aXJfc3RyaWRlID0gMDsKPj4gICAJZG1hX2FkZHJfdCB5cmdiX21zdDsK Pj4gKwlkbWFfYWRkcl90IHV2X21zdCA9IDA7Cj4+ICAgCWVudW0gdm9wX2RhdGFfZm9ybWF0IGZv cm1hdDsKPj4gICAJdWludDMyX3QgdmFsOwo+PiAgIAlib29sIGlzX2FscGhhOwo+PiArCWJvb2wg aXNfeXV2Owo+PiAgIAlib29sIHZpc2libGU7Cj4+ICAgCWludCByZXQ7Cj4+ICAgCXN0cnVjdCBk cm1fcmVjdCBkZXN0ID0gewo+PiBAQCAtNjIwLDYgKzYzNyw4IEBAIHN0YXRpYyBpbnQgdm9wX3Vw ZGF0ZV9wbGFuZV9ldmVudChzdHJ1Y3QgZHJtX3BsYW5lCj4+ICpwbGFuZSwgcmV0dXJuIDA7Cj4+ Cj4+ICAgCWlzX2FscGhhID0gaXNfYWxwaGFfc3VwcG9ydChmYi0+cGl4ZWxfZm9ybWF0KTsKPj4g Kwlpc195dXYgPSBpc195dXZfc3VwcG9ydChmYi0+cGl4ZWxfZm9ybWF0KTsKPj4gKwo+PiAgIAlm b3JtYXQgPSB2b3BfY29udmVydF9mb3JtYXQoZmItPnBpeGVsX2Zvcm1hdCk7Cj4+ICAgCWlmIChm b3JtYXQgPCAwKQo+PiAgIAkJcmV0dXJuIGZvcm1hdDsKPiBzYW1lIGFzIGFib3ZlCj4KPgo+IEhl aWtvCj4KPgo+CgoKLS0gCu+8rWFyawoKCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fCmRyaS1kZXZlbCBtYWlsaW5nIGxpc3QKZHJpLWRldmVsQGxpc3RzLmZy ZWVkZXNrdG9wLm9yZwpodHRwOi8vbGlzdHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGlu Zm8vZHJpLWRldmVsCg== From mboxrd@z Thu Jan 1 00:00:00 1970 From: mark.yao@rock-chips.com (Mark yao) Date: Thu, 23 Jul 2015 10:01:58 +0800 Subject: [PATCH v3 3/6] drm/rockchip: vop: Add yuv plane support In-Reply-To: <7451281.fUv3gEKea6@diego> References: <1437466807-13689-1-git-send-email-mark.yao@rock-chips.com> <1437466807-13689-4-git-send-email-mark.yao@rock-chips.com> <7451281.fUv3gEKea6@diego> Message-ID: <55B04B16.7030005@rock-chips.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 2015?07?23? 05:51, Heiko St?bner wrote: > Am Dienstag, 21. Juli 2015, 16:20:04 schrieb Mark Yao: >> vop support yuv with NV12, NV16 and NV24, only 2 plane yuv. >> >> Signed-off-by: Mark Yao >> --- >> Changes in v3: >> Adviced by Tomasz Figa >> - separate dest calculate to another patch >> - fix src x1,x2 when do align, and remove unnecessary src.y1 align. >> >> Changes in v2: >> - Uv buffer not support odd offset, align it. >> - Fix error display when move yuv image. >> >> drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 56 >> ++++++++++++++++++++++++++- 1 file changed, 54 insertions(+), 2 >> deletions(-) >> >> diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c >> b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index c7e0283..47ce943 100644 >> --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c >> +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c >> @@ -373,6 +373,18 @@ static enum vop_data_format vop_convert_format(uint32_t >> format) } >> } >> >> +static bool is_yuv_support(uint32_t format) >> +{ >> + switch (format) { >> + case DRM_FORMAT_NV12: >> + case DRM_FORMAT_NV16: >> + case DRM_FORMAT_NV24: >> + return true; >> + default: >> + return false; >> + } >> +} >> + >> static bool is_alpha_support(uint32_t format) >> { >> switch (format) { >> @@ -577,16 +589,21 @@ static int vop_update_plane_event(struct drm_plane > > does not apply to what's in mainline, as this patch seems to ignore > 85a359f25388 ("drm/rockchip: Add BGR formats to VOP") > from Tomasz > Hmm, I found the patch ("drm/rockchip: Add BGR formats to VOP") is on the drm-fixes branch, so I didn't resend the patch. Ok, I will rebase these patches top of the "Add BGR formats to VOP". >> *plane, struct vop *vop = to_vop(crtc); >> struct drm_gem_object *obj; >> struct rockchip_gem_object *rk_obj; >> + struct drm_gem_object *uv_obj; >> + struct rockchip_gem_object *rk_uv_obj; >> unsigned long offset; >> unsigned int actual_w; >> unsigned int actual_h; >> unsigned int dsp_stx; >> unsigned int dsp_sty; >> unsigned int y_vir_stride; >> + unsigned int uv_vir_stride = 0; >> dma_addr_t yrgb_mst; >> + dma_addr_t uv_mst = 0; >> enum vop_data_format format; >> uint32_t val; >> bool is_alpha; >> + bool is_yuv; >> bool visible; >> int ret; >> struct drm_rect dest = { >> @@ -620,6 +637,8 @@ static int vop_update_plane_event(struct drm_plane >> *plane, return 0; >> >> is_alpha = is_alpha_support(fb->pixel_format); >> + is_yuv = is_yuv_support(fb->pixel_format); >> + >> format = vop_convert_format(fb->pixel_format); >> if (format < 0) >> return format; > same as above > > > Heiko > > > -- ?ark From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754662AbbGWCCQ (ORCPT ); Wed, 22 Jul 2015 22:02:16 -0400 Received: from regular1.263xmail.com ([211.150.99.140]:50637 "EHLO regular1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753862AbbGWCCL (ORCPT ); Wed, 22 Jul 2015 22:02:11 -0400 X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-ADDR-CHECKED: 0 X-RL-SENDER: mark.yao@rock-chips.com X-FST-TO: heiko@sntech.de X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: mark.yao@rock-chips.com X-UNIQUE-TAG: <5348f2136af2a85934af837420d8df46> X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 Message-ID: <55B04B16.7030005@rock-chips.com> Date: Thu, 23 Jul 2015 10:01:58 +0800 From: Mark yao User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.2.0 MIME-Version: 1.0 To: =?UTF-8?B?SGVpa28gU3TDvGJuZXI=?= CC: dri-devel@lists.freedesktop.org, David Airlie , Daniel Kurtz , Philipp Zabel , Daniel Vetter , Rob Clark , tfiga@chromium.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, sandy.huang@rock-chips.com, dkm@rock-chips.com, zwl@rock-chips.com, xw@rock-chips.com Subject: Re: [PATCH v3 3/6] drm/rockchip: vop: Add yuv plane support References: <1437466807-13689-1-git-send-email-mark.yao@rock-chips.com> <1437466807-13689-4-git-send-email-mark.yao@rock-chips.com> <7451281.fUv3gEKea6@diego> In-Reply-To: <7451281.fUv3gEKea6@diego> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2015年07月23日 05:51, Heiko Stübner wrote: > Am Dienstag, 21. Juli 2015, 16:20:04 schrieb Mark Yao: >> vop support yuv with NV12, NV16 and NV24, only 2 plane yuv. >> >> Signed-off-by: Mark Yao >> --- >> Changes in v3: >> Adviced by Tomasz Figa >> - separate dest calculate to another patch >> - fix src x1,x2 when do align, and remove unnecessary src.y1 align. >> >> Changes in v2: >> - Uv buffer not support odd offset, align it. >> - Fix error display when move yuv image. >> >> drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 56 >> ++++++++++++++++++++++++++- 1 file changed, 54 insertions(+), 2 >> deletions(-) >> >> diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c >> b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index c7e0283..47ce943 100644 >> --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c >> +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c >> @@ -373,6 +373,18 @@ static enum vop_data_format vop_convert_format(uint32_t >> format) } >> } >> >> +static bool is_yuv_support(uint32_t format) >> +{ >> + switch (format) { >> + case DRM_FORMAT_NV12: >> + case DRM_FORMAT_NV16: >> + case DRM_FORMAT_NV24: >> + return true; >> + default: >> + return false; >> + } >> +} >> + >> static bool is_alpha_support(uint32_t format) >> { >> switch (format) { >> @@ -577,16 +589,21 @@ static int vop_update_plane_event(struct drm_plane > > does not apply to what's in mainline, as this patch seems to ignore > 85a359f25388 ("drm/rockchip: Add BGR formats to VOP") > from Tomasz > Hmm, I found the patch ("drm/rockchip: Add BGR formats to VOP") is on the drm-fixes branch, so I didn't resend the patch. Ok, I will rebase these patches top of the "Add BGR formats to VOP". >> *plane, struct vop *vop = to_vop(crtc); >> struct drm_gem_object *obj; >> struct rockchip_gem_object *rk_obj; >> + struct drm_gem_object *uv_obj; >> + struct rockchip_gem_object *rk_uv_obj; >> unsigned long offset; >> unsigned int actual_w; >> unsigned int actual_h; >> unsigned int dsp_stx; >> unsigned int dsp_sty; >> unsigned int y_vir_stride; >> + unsigned int uv_vir_stride = 0; >> dma_addr_t yrgb_mst; >> + dma_addr_t uv_mst = 0; >> enum vop_data_format format; >> uint32_t val; >> bool is_alpha; >> + bool is_yuv; >> bool visible; >> int ret; >> struct drm_rect dest = { >> @@ -620,6 +637,8 @@ static int vop_update_plane_event(struct drm_plane >> *plane, return 0; >> >> is_alpha = is_alpha_support(fb->pixel_format); >> + is_yuv = is_yuv_support(fb->pixel_format); >> + >> format = vop_convert_format(fb->pixel_format); >> if (format < 0) >> return format; > same as above > > > Heiko > > > -- Ｍark