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From: Andrea Scian <rnd4@dave-tech.it>
To: beanhuo@micron.com
Cc: Boris Brezillon <boris.brezillon@free-electrons.com>,
	linux-mtd@lists.infradead.org
Subject: Re: [PATCH 1/2] mtd: nand: use a lower value for badblockbits when working with MLC NAND
Date: Thu, 23 Jul 2015 23:24:54 +0200	[thread overview]
Message-ID: <55B15BA6.5050600@dave-tech.it> (raw)
In-Reply-To: <551E8D21.7050507@dave-tech.it>


Dear Bean,

Il 21/07/2015 16:50, Bean Huo 霍斌斌 (beanhuo) ha scritto:
 > Hi,
 > What is status of this patch? I think 4 bits is make sense for all
 > MLC nand,
 > Bit flips on bad block mark should not be regarded as a bad block.
 >

I think that there was something wrong with your email, because I didn't 
see it in MTD ML archives, probably it has been blocked for some reason.

I didn't find a solution to implement Boris suggestions on how to choose 
the bad block bit threshold. In my implementation is still statically 
defined.

However I did some minor changes to the second patch, I'll send it in a 
few minutes.

Any feedback is welcome, of course ;-)

Kind Regards,

Andrea Scian


Il 03/04/2015 14:52, Andrea Scian ha scritto:
>
> Sorry for the later feedback, but unfortunately I had to move to other
> stuff before coming back to this topic
>
> Il 15/03/2015 10:07, Boris Brezillon ha scritto:
>> Hi Andrea,
>>
>> On Fri,  6 Mar 2015 13:12:17 +0100
>> rnd4@dave-tech.it wrote:
>>
>>> From: Andrea Scian <andrea.scian@dave.eu>
>>>
>>> MLC NANDs have more bit flips that SLC. When looking for bad block
>>> marker we have a lot of false positive if we check for the whole byte. To
>>> avoid this tolerate a few (4 here) bit flips for byte.
>>
>> I'm not sure sure we want to accept 4 bitflips for all MLC NANDs. IMHO
>> this value should be chip dependent.
>
> I agree
>
>> I know there is currently no way to retrieve this information,
>
> For this reason I just put a hardcoded value.
>
>> so here are two suggestions:
>>
>> 1/ make this value depend on the required NAND ecc strength
>> (badblockbits = ecc_strength / 10 ?)
>> 2/ let each controller change this value after nand_scan_ident
>> depending on the detected chip until we find a generic solution to
>> select this value
>
> I'll try to figure out how to solve this
> Any suggestion is welcome!
>
> Regards,
>

-- 

Andrea SCIAN

DAVE Embedded Systems

  reply	other threads:[~2015-07-23 21:25 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-03-06 12:12 [PATCH 0/2] Use badblockbits-like approach in nand_bbt.c rnd4
2015-03-06 12:12 ` [PATCH 1/2] mtd: nand: use a lower value for badblockbits when working with MLC NAND rnd4
2015-03-15  9:07   ` Boris Brezillon
2015-04-03 12:52     ` Andrea Scian
2015-07-23 21:24       ` Andrea Scian [this message]
2015-07-23 22:00         ` Brian Norris
2015-03-06 12:12 ` [PATCH 2/2] mtd: nand: use nand_chip badblockbits when checking bad block pattern rnd4
2015-03-15  9:18   ` Boris Brezillon
2015-10-13 10:46 ` [PATCH 0/2] Use badblockbits-like approach in nand_bbt.c Boris Brezillon
2015-10-13 18:04   ` Brian Norris
     [not found] <A765B125120D1346A63912DDE6D8B6310BF69672@NTXXIAMBX02.xacn.micron.com>
2016-03-09 14:26 ` [PATCH 1/2] mtd: nand: use a lower value for badblockbits when working with MLC NAND Boris Brezillon
2016-03-09 16:37   ` Andrea Scian
2016-03-10  2:48     ` Bean Huo 霍斌斌 (beanhuo)

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