All of lore.kernel.org
 help / color / mirror / Atom feed
From: Michel Thierry <michel.thierry@intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>,
	intel-gfx@lists.freedesktop.org, akash.goel@intel.com
Subject: Re: [PATCH v5 17/19] drm/i915: Wa32bitGeneralStateOffset & Wa32bitInstructionBaseOffset
Date: Tue, 28 Jul 2015 12:12:11 +0100	[thread overview]
Message-ID: <55B7638B.7060500@intel.com> (raw)
In-Reply-To: <20150727211142.GA26718@nuc-i3427.alporthouse.com>

On 7/27/2015 10:11 PM, Chris Wilson wrote:
> On Thu, Jul 16, 2015 at 10:33:29AM +0100, Michel Thierry wrote:
>> +	if (!(entry->flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS) &&
>> +	    (vma->node.start + vma->node.size) >= (1ULL << 32))
>> +		return true;
>
> gcc completely screwed this up here and used 0 for 1ULL<<32.
>
> Note that we can allow state + size == 4G (since the end is exclusive),
> so I went with
>
>    if ((entry->flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS) == 0 &&
>        (vma->node.start + vma->node.size - 1) >> 32)
>           return true;
>
> instead.
> -Chris
>

Thanks, I'll include this change in the next patch version.
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2015-07-28 11:12 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-07-16  9:33 [PATCH v5 00/19] 48-bit PPGTT Michel Thierry
2015-07-16  9:33 ` [PATCH v5 01/19] drm/i915: Remove unnecessary gen8_clamp_pd Michel Thierry
2015-07-16  9:33 ` [PATCH v5 02/19] drm/i915/gen8: Make pdp allocation more dynamic Michel Thierry
2015-07-16  9:33 ` [PATCH v5 03/19] drm/i915/gen8: Abstract PDP usage Michel Thierry
2015-07-16  9:33 ` [PATCH v5 04/19] drm/i915/gen8: Add dynamic page trace events Michel Thierry
2015-07-16  9:33 ` [PATCH v5 05/19] drm/i915/gen8: Add PML4 structure Michel Thierry
2015-07-16  9:33 ` [PATCH v5 06/19] drm/i915/gen8: implement alloc/free for 4lvl Michel Thierry
2015-07-29 14:34   ` Michel Thierry
2015-07-16  9:33 ` [PATCH v5 07/19] drm/i915/gen8: Add 4 level switching infrastructure and lrc support Michel Thierry
2015-07-29 14:34   ` Michel Thierry
2015-07-16  9:33 ` [PATCH v5 08/19] drm/i915/gen8: Generalize PTE writing for GEN8 PPGTT Michel Thierry
2015-07-29 14:35   ` Michel Thierry
2015-07-16  9:33 ` [PATCH v5 09/19] drm/i915/gen8: Pass sg_iter through pte inserts Michel Thierry
2015-07-16  9:33 ` [PATCH v5 10/19] drm/i915/gen8: Add 4 level support in insert_entries and clear_range Michel Thierry
2015-07-16  9:33 ` [PATCH v5 11/19] drm/i915/gen8: Initialize PDPs Michel Thierry
2015-07-29 14:35   ` Michel Thierry
2015-07-16  9:33 ` [PATCH v5 12/19] drm/i915: Expand error state's address width to 64b Michel Thierry
2015-07-16  9:33 ` [PATCH v5 13/19] drm/i915/gen8: Add ppgtt info and debug_dump Michel Thierry
2015-07-16  9:33 ` [PATCH v5 14/19] drm/i915: object size needs to be u64 Michel Thierry
2015-07-16  9:33 ` [PATCH v5 15/19] drm/i915: batch_obj vm offset must " Michel Thierry
2015-07-16  9:33 ` [PATCH v5 16/19] drm/i915/userptr: Kill user_size limit check Michel Thierry
2015-07-16  9:33 ` [PATCH v5 17/19] drm/i915: Wa32bitGeneralStateOffset & Wa32bitInstructionBaseOffset Michel Thierry
2015-07-27 14:34   ` Goel, Akash
2015-07-27 14:46     ` Chris Wilson
2015-07-27 14:53       ` Michel Thierry
2015-07-27 21:11   ` Chris Wilson
2015-07-28 11:12     ` Michel Thierry [this message]
2015-07-28 14:43       ` Chris Wilson
2015-07-29 11:05         ` Michel Thierry
2015-07-29 11:17           ` Chris Wilson
2015-07-16  9:33 ` [PATCH v5 18/19] drm/i915/gen8: Flip the 48b switch Michel Thierry
2015-07-16  9:33 ` [PATCH v5 19/19] drm/i915: Save some page table setup on repeated binds Michel Thierry
2015-07-28 12:18 ` [PATCH v5 00/19] 48-bit PPGTT Chris Wilson

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=55B7638B.7060500@intel.com \
    --to=michel.thierry@intel.com \
    --cc=akash.goel@intel.com \
    --cc=chris@chris-wilson.co.uk \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.