From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sivakumar Thulasimani Subject: Re: [PATCH 3/3] drm/i915: Support DDI lane reversal for DP Date: Wed, 29 Jul 2015 13:56:13 +0530 Message-ID: <55B88E25.6000006@intel.com> References: <1438099409-25456-1-git-send-email-benjamin.tissoires@redhat.com> <1438099409-25456-4-git-send-email-benjamin.tissoires@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8"; Format="flowed" Content-Transfer-Encoding: base64 Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 51D7D6EBA1 for ; Wed, 29 Jul 2015 01:26:16 -0700 (PDT) In-Reply-To: <1438099409-25456-4-git-send-email-benjamin.tissoires@redhat.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Benjamin Tissoires , Daniel Vetter Cc: intel-gfx@lists.freedesktop.org, Todd Broch , linux-kernel@vger.kernel.org List-Id: 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E=Sophos;i="5.15,569,1432623600"; d="scan'208";a="737728404" Message-ID: <55B88E25.6000006@intel.com> Date: Wed, 29 Jul 2015 13:56:13 +0530 From: Sivakumar Thulasimani User-Agent: Mozilla/5.0 (Windows NT 6.2; WOW64; rv:31.0) Gecko/20100101 Thunderbird/31.7.0 MIME-Version: 1.0 To: Benjamin Tissoires , Daniel Vetter CC: intel-gfx@lists.freedesktop.org, Todd Broch , linux-kernel@vger.kernel.org Subject: Re: [Intel-gfx] [PATCH 3/3] drm/i915: Support DDI lane reversal for DP References: <1438099409-25456-1-git-send-email-benjamin.tissoires@redhat.com> <1438099409-25456-4-git-send-email-benjamin.tissoires@redhat.com> In-Reply-To: <1438099409-25456-4-git-send-email-benjamin.tissoires@redhat.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org why not detect reverse in intel_dp_detect/intel_hpd_pulse ? that way you can identify both lane count and reversal state without touching anything in the link training code. i am yet to upstream my changes for CHT that i can share if required that does the same in intel_dp_detect without touching any line in link training path. On 7/28/2015 9:33 PM, Benjamin Tissoires wrote: > The DP outputs connected through a USB Type-C port can have inverted > lanes. To detect that case, we implement autodetection by training only > the first lane if it doesn't work, we assume that we need to invert > the lanes. > > Tested on a Chromebook Pixel 2015 (samus) with a USB Type-C to HDMI > adapter and a Dell 4K and some various regular monitors. > > Based on 2 patches from the ChromeOS tree by: > Stéphane Marchesin > Todd Broch > > Signed-off-by: Benjamin Tissoires > --- > drivers/gpu/drm/i915/intel_ddi.c | 13 +++++++++++++ > drivers/gpu/drm/i915/intel_dp.c | 36 ++++++++++++++++++++++++++++++++++++ > drivers/gpu/drm/i915/intel_drv.h | 1 + > 3 files changed, 50 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c > index 9a40bfb..0b0c1ec 100644 > --- a/drivers/gpu/drm/i915/intel_ddi.c > +++ b/drivers/gpu/drm/i915/intel_ddi.c > @@ -2249,6 +2249,7 @@ static void intel_ddi_pre_enable(struct intel_encoder *intel_encoder) > enum port port = intel_ddi_get_encoder_port(intel_encoder); > int type = intel_encoder->type; > int hdmi_level; > + bool reversed = false; > > if (type == INTEL_OUTPUT_EDP) { > struct intel_dp *intel_dp = enc_to_intel_dp(encoder); > @@ -2295,8 +2296,20 @@ static void intel_ddi_pre_enable(struct intel_encoder *intel_encoder) > if (type == INTEL_OUTPUT_DISPLAYPORT || type == INTEL_OUTPUT_EDP) { > struct intel_dp *intel_dp = enc_to_intel_dp(encoder); > > + if (IS_BROADWELL(dev) && type == INTEL_OUTPUT_DISPLAYPORT) { > + intel_ddi_init_dp_buf_reg(intel_encoder); > + reversed = intel_dp_is_reversed(intel_dp); > + } > + > intel_ddi_init_dp_buf_reg(intel_encoder); > > + if (IS_BROADWELL(dev)) { > + if (reversed) > + intel_dp->DP |= DDI_BUF_PORT_REVERSAL; > + else > + intel_dp->DP &= ~DDI_BUF_PORT_REVERSAL; > + } > + > intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); > intel_dp_start_link_train(intel_dp); > intel_dp_complete_link_train(intel_dp); > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > index b740987..18280cc 100644 > --- a/drivers/gpu/drm/i915/intel_dp.c > +++ b/drivers/gpu/drm/i915/intel_dp.c > @@ -3820,6 +3820,42 @@ intel_dp_complete_link_train(struct intel_dp *intel_dp) > intel_dp->DP = DP; > } > > +bool intel_dp_is_reversed(struct intel_dp *intel_dp) > +{ > + struct drm_encoder *encoder = &dp_to_dig_port(intel_dp)->base.base; > + struct drm_device *dev = encoder->dev; > + struct drm_i915_private *dev_priv = dev->dev_private; > + uint32_t DP = intel_dp->DP; > + > + /* > + * Train with 1 lane. There is no guarantee that the monitor supports > + * 2 or 4 lanes, and we wouldn't see any asymetricity with 4 lanes. > + */ > + const uint8_t lane_count = 1; > + bool reversed; > + > + if (!HAS_DDI(dev)) > + return false; > + > + DP &= ~(DDI_BUF_PORT_REVERSAL | DDI_PORT_WIDTH(4)); > + DP |= DDI_PORT_WIDTH(lane_count); > + > + I915_WRITE(intel_dp->output_reg, DP); > + POSTING_READ(intel_dp->output_reg); > + udelay(600); > + > + if (!_intel_dp_start_link_train(intel_dp, lane_count, &DP, true)) > + return true; > + > + reversed = !_intel_dp_complete_link_train(intel_dp, lane_count, &DP, true); > + > + /* clear training, we had only one lane */ > + intel_dp->train_set_valid = false; > + > + return reversed; > + > +} > + > void intel_dp_stop_link_train(struct intel_dp *intel_dp) > { > intel_dp_set_link_train(intel_dp, &intel_dp->DP, > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h > index 320c9e6..cba00c6 100644 > --- a/drivers/gpu/drm/i915/intel_drv.h > +++ b/drivers/gpu/drm/i915/intel_drv.h > @@ -1169,6 +1169,7 @@ int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc); > bool intel_dp_compute_config(struct intel_encoder *encoder, > struct intel_crtc_state *pipe_config); > bool intel_dp_is_edp(struct drm_device *dev, enum port port); > +bool intel_dp_is_reversed(struct intel_dp *intel_dp); > enum irqreturn intel_dp_hpd_pulse(struct intel_digital_port *intel_dig_port, > bool long_hpd); > void intel_edp_backlight_on(struct intel_dp *intel_dp); -- regards, Sivakumar