diff for duplicates of <55BA7649.3080608@arm.com>

diff --git a/a/1.txt b/N1/1.txt
index 2da9a56..1a620ef 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,8 +1,8 @@
 On 30/07/15 19:45, Will Deacon wrote:
 > Hello,
 >
-> On Thu, Jul 30, 2015 at 06:55:06PM +0100, tchalamarla-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org wrote:
->> From: Tirumalesh Chalamarla <tchalamarla-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org>
+> On Thu, Jul 30, 2015 at 06:55:06PM +0100, tchalamarla at caviumnetworks.com wrote:
+>> From: Tirumalesh Chalamarla <tchalamarla@caviumnetworks.com>
 >>
 >> The SMMU architecture defines two different behaviors when 64-bit
 >> registers are written with 32-bit writes.  The first behavior causes
@@ -19,7 +19,7 @@ On 30/07/15 19:45, Will Deacon wrote:
 >>    SMMU()_CB()_TTBR1
 >>    SMMU()_CB()_FAR
 >>
->> Signed-off-by: Tirumalesh Chalamarla <tchalamarla-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org>
+>> Signed-off-by: Tirumalesh Chalamarla <tchalamarla@caviumnetworks.com>
 >> ---
 >>   drivers/iommu/arm-smmu.c | 51 ++++++++++++++++++++++++++++++++++--------------
 >>   1 file changed, 36 insertions(+), 15 deletions(-)
@@ -86,6 +86,6 @@ Robin.
 > Will
 > _______________________________________________
 > iommu mailing list
-> iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org
+> iommu at lists.linux-foundation.org
 > https://lists.linuxfoundation.org/mailman/listinfo/iommu
 >
diff --git a/a/content_digest b/N1/content_digest
index cf5530e..5183764 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,22 +1,16 @@
  "ref\01438278906-29627-1-git-send-email-tchalamarla@caviumnetworks.com\0"
  "ref\020150730184523.GC16663@arm.com\0"
- "ref\020150730184523.GC16663-5wv7dgnIgG8@public.gmane.org\0"
- "From\0Robin Murphy <robin.murphy-5wv7dgnIgG8@public.gmane.org>\0"
- "Subject\0Re: [PATCH] iommu/arm-smmu-v2: ThunderX(errata-23399) mis-extends 64bit registers\0"
+ "From\0robin.murphy@arm.com (Robin Murphy)\0"
+ "Subject\0[PATCH] iommu/arm-smmu-v2: ThunderX(errata-23399) mis-extends 64bit registers\0"
  "Date\0Thu, 30 Jul 2015 20:08:57 +0100\0"
- "To\0Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>"
- " tchalamarla-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org <tchalamarla-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org>\0"
- "Cc\0iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org <iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org>"
-  robert.richter-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org <robert.richter-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org>
-  linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org>
- " linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>\0"
+ "To\0linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
  "On 30/07/15 19:45, Will Deacon wrote:\n"
  "> Hello,\n"
  ">\n"
- "> On Thu, Jul 30, 2015 at 06:55:06PM +0100, tchalamarla-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org wrote:\n"
- ">> From: Tirumalesh Chalamarla <tchalamarla-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org>\n"
+ "> On Thu, Jul 30, 2015 at 06:55:06PM +0100, tchalamarla at caviumnetworks.com wrote:\n"
+ ">> From: Tirumalesh Chalamarla <tchalamarla@caviumnetworks.com>\n"
  ">>\n"
  ">> The SMMU architecture defines two different behaviors when 64-bit\n"
  ">> registers are written with 32-bit writes.  The first behavior causes\n"
@@ -33,7 +27,7 @@
  ">>    SMMU()_CB()_TTBR1\n"
  ">>    SMMU()_CB()_FAR\n"
  ">>\n"
- ">> Signed-off-by: Tirumalesh Chalamarla <tchalamarla-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org>\n"
+ ">> Signed-off-by: Tirumalesh Chalamarla <tchalamarla@caviumnetworks.com>\n"
  ">> ---\n"
  ">>   drivers/iommu/arm-smmu.c | 51 ++++++++++++++++++++++++++++++++++--------------\n"
  ">>   1 file changed, 36 insertions(+), 15 deletions(-)\n"
@@ -100,8 +94,8 @@
  "> Will\n"
  "> _______________________________________________\n"
  "> iommu mailing list\n"
- "> iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org\n"
+ "> iommu at lists.linux-foundation.org\n"
  "> https://lists.linuxfoundation.org/mailman/listinfo/iommu\n"
  >
 
-6e89fac4b00a444b1d492ba1d738ab970984f0a16a763db768886798edcb7eef
+bd2edc4988a8930eefb75fae2c0f7d60bf028c5e58d8464e2961634f610399b4
