From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paolo Bonzini Subject: Re: [PATCH 1/2] KVM: x86: set TMR when the interrupt is accepted Date: Fri, 31 Jul 2015 10:01:38 +0200 Message-ID: <55BB2B62.1030605@redhat.com> References: <1438177055-26764-1-git-send-email-pbonzini@redhat.com> <1438177055-26764-2-git-send-email-pbonzini@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Cc: "alex.williamson@redhat.com" , "srutherford@intel.com" To: "Zhang, Yang Z" , "linux-kernel@vger.kernel.org" , "kvm@vger.kernel.org" Return-path: In-Reply-To: Sender: linux-kernel-owner@vger.kernel.org List-Id: kvm.vger.kernel.org On 31/07/2015 01:26, Zhang, Yang Z wrote: >>> Do not compute TMR in advance. Instead, set the TMR just before >>> the interrupt is accepted into the IRR. This limits the coupling >>> between IOAPIC and LAPIC. > > Uh.., it back to original way which is wrong. You cannot modify the > apic page(here is the TMR reg) directly when the corresponding VMCS > may be used at same time. Where is this documented? The TMR is not part of the set of virtualized APIC registers (TPR, PPR, EOI, ISR, IRR, ICR+ICR2; SDM 29.1.1). Only virtualized APIC register reads use the virtual TMR registers (SDM 29.4.2 or 29.5), but these just read data from the corresponding field in the virtual APIC page. Paolo