From: York Sun <yorksun@freescale.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 1/1] T102xRDB: Enable ifc nand ecc encode and decode
Date: Fri, 31 Jul 2015 08:46:54 -0700 [thread overview]
Message-ID: <55BB986E.3030103@freescale.com> (raw)
In-Reply-To: <1432288267-25211-1-git-send-email-raghav@freescale.com>
On 05/22/2015 02:51 AM, Raghav Dogra wrote:
> From: Jaiprakash Singh <b44839@freescale.com>
>
> IFC nand ecc encode and decode mode are not correctly
> set in CSOR register during nand initialization.Enable
> ecc encode/decode in 4-bit mode
>
> Signed-off-by: Jaiprakash Singh <b44839@freescale.com>
> ---
Applied to u-boot-mpc85xx master after fixing subject.
Thanks.
York
next prev parent reply other threads:[~2015-07-31 15:46 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-22 9:51 [U-Boot] [PATCH 1/1] T102xRDB: Enable ifc nand ecc encode and decode Raghav Dogra
2015-07-31 15:46 ` York Sun [this message]
-- strict thread matches above, loose matches on Subject: below --
2015-05-22 8:50 Jaiprakash Singh
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