From: Sergei Shtylyov <sergei.shtylyov-M4DtvfQ/ZS1MRgGoP+s0PdBPR1lH4CV8@public.gmane.org>
To: Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>,
iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org
Cc: marc.zyngier-5wv7dgnIgG8@public.gmane.org,
jroedel-l3A5Bk7waGM@public.gmane.org,
laurent.pinchart+renesas-ryLnwIuWjnjg/C1BVhZhaw@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: Re: [PATCH 13/13] iommu/arm-smmu: Treat unknown OAS as 48-bit
Date: Mon, 3 Aug 2015 21:23:14 +0300 [thread overview]
Message-ID: <55BFB192.1040505@cogentembedded.com> (raw)
In-Reply-To: <1438608355-7335-14-git-send-email-will.deacon-5wv7dgnIgG8@public.gmane.org>
Hello.
On 08/03/2015 04:25 PM, Will Deacon wrote:
> A late change to the SMMUv3 architecture ensures that the OAS field
> will be monotonically increasing, so we can assume that an unknown OAS
> is at least 48-bit and use that, rather than fail the device probe.
> Signed-off-by: Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>
> ---
> drivers/iommu/arm-smmu-v3.c | 7 +++----
> 1 file changed, 3 insertions(+), 4 deletions(-)
> diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
> index 15fb669282b4..a435e706226a 100644
> --- a/drivers/iommu/arm-smmu-v3.c
> +++ b/drivers/iommu/arm-smmu-v3.c
> @@ -2528,12 +2528,11 @@ static int arm_smmu_device_probe(struct arm_smmu_device *smmu)
> case IDR5_OAS_44_BIT:
> smmu->oas = 44;
> break;
> + default:
> + dev_info(smmu->dev,
> + "unknown output address size. Truncating to 48-bit\n");
Please add a comment like /* FALLTHRU */ here.
> case IDR5_OAS_48_BIT:
> smmu->oas = 48;
> - break;
> - default:
> - dev_err(smmu->dev, "unknown output address size!\n");
> - return -ENXIO;
> }
>
> /* Set the DMA mask for our table walker */
MBR, Sergei
WARNING: multiple messages have this Message-ID (diff)
From: sergei.shtylyov@cogentembedded.com (Sergei Shtylyov)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 13/13] iommu/arm-smmu: Treat unknown OAS as 48-bit
Date: Mon, 3 Aug 2015 21:23:14 +0300 [thread overview]
Message-ID: <55BFB192.1040505@cogentembedded.com> (raw)
In-Reply-To: <1438608355-7335-14-git-send-email-will.deacon@arm.com>
Hello.
On 08/03/2015 04:25 PM, Will Deacon wrote:
> A late change to the SMMUv3 architecture ensures that the OAS field
> will be monotonically increasing, so we can assume that an unknown OAS
> is at least 48-bit and use that, rather than fail the device probe.
> Signed-off-by: Will Deacon <will.deacon@arm.com>
> ---
> drivers/iommu/arm-smmu-v3.c | 7 +++----
> 1 file changed, 3 insertions(+), 4 deletions(-)
> diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
> index 15fb669282b4..a435e706226a 100644
> --- a/drivers/iommu/arm-smmu-v3.c
> +++ b/drivers/iommu/arm-smmu-v3.c
> @@ -2528,12 +2528,11 @@ static int arm_smmu_device_probe(struct arm_smmu_device *smmu)
> case IDR5_OAS_44_BIT:
> smmu->oas = 44;
> break;
> + default:
> + dev_info(smmu->dev,
> + "unknown output address size. Truncating to 48-bit\n");
Please add a comment like /* FALLTHRU */ here.
> case IDR5_OAS_48_BIT:
> smmu->oas = 48;
> - break;
> - default:
> - dev_err(smmu->dev, "unknown output address size!\n");
> - return -ENXIO;
> }
>
> /* Set the DMA mask for our table walker */
MBR, Sergei
next prev parent reply other threads:[~2015-08-03 18:23 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-08-03 13:25 [PATCH 00/13] iommu/arm-smmu: Updates for 4.3 Will Deacon
2015-08-03 13:25 ` Will Deacon
[not found] ` <1438608355-7335-1-git-send-email-will.deacon-5wv7dgnIgG8@public.gmane.org>
2015-08-03 13:25 ` [PATCH 01/13] iommu/arm-smmu: Fix enabling of PRIQ interrupt Will Deacon
2015-08-03 13:25 ` Will Deacon
2015-08-03 13:25 ` [PATCH 02/13] iommu/arm-smmu: Fix MSI memory attributes to match specification Will Deacon
2015-08-03 13:25 ` Will Deacon
2015-08-03 13:25 ` [PATCH 03/13] iommu/arm-smmu: Limit 2-level strtab allocation for small SID sizes Will Deacon
2015-08-03 13:25 ` Will Deacon
2015-08-03 13:25 ` [PATCH 04/13] iommu/arm-smmu: Sort out coherency Will Deacon
2015-08-03 13:25 ` Will Deacon
2015-08-03 13:25 ` [PATCH 05/13] iommu/io-pgtable-arm: Allow appropriate DMA API use Will Deacon
2015-08-03 13:25 ` Will Deacon
[not found] ` <1438608355-7335-6-git-send-email-will.deacon-5wv7dgnIgG8@public.gmane.org>
2015-08-04 13:16 ` Laurent Pinchart
2015-08-04 13:16 ` Laurent Pinchart
2015-08-04 14:47 ` Robin Murphy
2015-08-04 14:47 ` Robin Murphy
[not found] ` <55C0D071.1040104-5wv7dgnIgG8@public.gmane.org>
2015-08-04 14:56 ` Russell King - ARM Linux
2015-08-04 14:56 ` Russell King - ARM Linux
[not found] ` <20150804145642.GQ7557-l+eeeJia6m9vn6HldHNs0ANdhmdF6hFW@public.gmane.org>
2015-08-04 20:54 ` Laurent Pinchart
2015-08-04 20:54 ` Laurent Pinchart
2015-08-05 16:24 ` Will Deacon
2015-08-05 16:24 ` Will Deacon
[not found] ` <20150805162452.GH6092-5wv7dgnIgG8@public.gmane.org>
2015-08-06 19:10 ` Laurent Pinchart
2015-08-06 19:10 ` Laurent Pinchart
2015-08-03 13:25 ` [PATCH 06/13] iommu/arm-smmu: Clean up DMA API usage Will Deacon
2015-08-03 13:25 ` Will Deacon
2015-08-03 13:25 ` [PATCH 07/13] " Will Deacon
2015-08-03 13:25 ` Will Deacon
2015-08-03 13:25 ` [PATCH 08/13] iommu/ipmmu-vmsa: " Will Deacon
2015-08-03 13:25 ` Will Deacon
2015-08-03 13:25 ` [PATCH 09/13] iommu/io-pgtable-arm: Centralise sync points Will Deacon
2015-08-03 13:25 ` Will Deacon
2015-08-03 13:25 ` [PATCH 10/13] iommu/arm-smmu: Remove arm_smmu_flush_pgtable() Will Deacon
2015-08-03 13:25 ` Will Deacon
2015-08-03 13:25 ` [PATCH 11/13] " Will Deacon
2015-08-03 13:25 ` Will Deacon
2015-08-03 13:25 ` [PATCH 12/13] iommu/io-pgtable: Remove flush_pgtable callback Will Deacon
2015-08-03 13:25 ` Will Deacon
2015-08-03 13:25 ` [PATCH 13/13] iommu/arm-smmu: Treat unknown OAS as 48-bit Will Deacon
2015-08-03 13:25 ` Will Deacon
[not found] ` <1438608355-7335-14-git-send-email-will.deacon-5wv7dgnIgG8@public.gmane.org>
2015-08-03 18:23 ` Sergei Shtylyov [this message]
2015-08-03 18:23 ` Sergei Shtylyov
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