From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:32831) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZPZOW-0004no-HQ for qemu-devel@nongnu.org; Wed, 12 Aug 2015 13:00:58 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZPZOQ-0001io-TS for qemu-devel@nongnu.org; Wed, 12 Aug 2015 13:00:52 -0400 Received: from mail-qg0-x229.google.com ([2607:f8b0:400d:c04::229]:34636) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZPZOQ-0001iU-5M for qemu-devel@nongnu.org; Wed, 12 Aug 2015 13:00:46 -0400 Received: by qgeg42 with SMTP id g42so14659289qge.1 for ; Wed, 12 Aug 2015 10:00:45 -0700 (PDT) Sender: Richard Henderson References: <1439151229-27747-1-git-send-email-laurent@vivier.eu> <1439151229-27747-20-git-send-email-laurent@vivier.eu> From: Richard Henderson Message-ID: <55CB7BB9.2030905@twiddle.net> Date: Wed, 12 Aug 2015 10:00:41 -0700 MIME-Version: 1.0 In-Reply-To: <1439151229-27747-20-git-send-email-laurent@vivier.eu> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH for-2.5 19/30] m68k: add cmpm List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Laurent Vivier , qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, Andreas Schwab , gerg@uclinux.org On 08/09/2015 01:13 PM, Laurent Vivier wrote: > Signed-off-by: Laurent Vivier > --- > target-m68k/translate.c | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > > diff --git a/target-m68k/translate.c b/target-m68k/translate.c > index ae57792..adf4521 100644 > --- a/target-m68k/translate.c > +++ b/target-m68k/translate.c > @@ -2002,6 +2002,24 @@ DISAS_INSN(eor) > > opsize = insn_opsize(insn, 6); > > + if (((insn >> 3) & 7) == 1) { > + /* cmpm */ Surely this can be separated out from EOR via masks at register_opcode time. And since this isn't a coldfire instruction... > + reg = AREG(insn, 0); > + src = gen_load(s, opsize, reg, 1); > + tcg_gen_addi_i32(reg, reg, opsize_bytes(opsize)); > + > + reg = AREG(insn, 9); > + dest = gen_load(s, opsize, reg, 1); > + tcg_gen_addi_i32(reg, reg, opsize_bytes(opsize)); > + > + reg = tcg_temp_new(); > + tcg_gen_sub_i32(reg, dest, src); > + gen_update_cc_add(reg, src); No need for the extra temp, reg. Simply modify dest. > + SET_CC_OP(opsize, SUB); > + > + return; > + } > + > SRC_EA(env, src, opsize, -1, &addr); > reg = DREG(insn, 9); > dest = tcg_temp_new(); >