From: Aravind Gopalakrishnan <aravind.gopalakrishnan@amd.com>
To: Jan Beulich <JBeulich@suse.com>
Cc: keir@xen.org, andrew.cooper3@citrix.com, xen-devel@lists.xen.org,
Suravee.Suthikulpanit@amd.com, "Hurwitz,
Sherry" <sherry.hurwitz@amd.com>,
boris.ostrovsky@oracle.com
Subject: Re: [PATCH V4 2/2] x86, amd_ucode: Skip microcode updates for final levels
Date: Thu, 13 Aug 2015 17:51:11 -0500 [thread overview]
Message-ID: <55CD1F5F.9040702@amd.com> (raw)
In-Reply-To: <55CB304D020000780009A085@prv-mh.provo.novell.com>
On 8/12/2015 4:38 AM, Jan Beulich wrote:
>>>> On 11.08.15 at 21:11, <aravind.gopalakrishnan@amd.com> wrote:
>> Some of older[Fam10h] systems require that certain number of
>> applied microcode patch levels should not be overwritten by
>> the microcode loader. Otherwise, system hangs are known to occur.
>>
>> The 'final_levels' of patch ids have been obtained empirically.
>> Refer bug https://bugzilla.suse.com/show_bug.cgi?id=913996
>> for details of the issue.
>>
>> The short version is that people have predominantly noticed
>> system hang issues when trying to update microcode levels
>> beyond the patch IDs below.
>> [0x01000098, 0x0100009f, 0x010000af]
>>
>> From internal discussions, we gathered that OS/hypervisor
>> cannot reliably perform microcode updates beyond these levels
>> due to hardware issues. Therefore, we need to abort microcode
>> update process if we hit any of these levels.
> While the patch itself looks fine now, I'm still hesitant to take this
> (even more so after having read through the bugzilla entry
> linked to above): The list being established empirically - will it be
> ever growing?
No, although the list is established empirically, it is not going to
continue to grow..
(see below..)
> Did you internally gain understanding of what it
> actually is that goes wrong (and hence can perhaps narrow
> down the conditions for the hangs to occur)? Have there been
> any checks whether indeed _all_ systems at the listed ucode
> levels are affected?
Yeah, HW architects mentioned they are aware of the problem and that
it's relevant only on Fam10h (which is why the list would not grow).
And they verified that it affects all the systems at the listed
microcode levels.
> Also that's leaving aside the question of what unfixed CPU issues
> people now being prevented from doing the ucode update are
> going to run into.
>
>
Right. So, the problem is that the user may have a perfectly normal
working system at the listed microcode levels, but the hang occurs
*only* when you try to update the patch level. Hence the recommendation
from HW architects to hold down the microcode level from
OS/hypervisor POV and not go ahead with the update process.
If the user has to update the microcode levels beyond these levels, then
BIOS updates are an option.
HTH,
Thanks,
-Aravind.
next prev parent reply other threads:[~2015-08-13 22:51 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-08-11 19:11 [PATCH V4 0/2] Update microcode driver Aravind Gopalakrishnan
2015-08-11 19:11 ` [PATCH V4 1/2] x86/microcode: Cleanup int type usage for cpu numbers Aravind Gopalakrishnan
2015-08-11 19:11 ` [PATCH V4 2/2] x86, amd_ucode: Skip microcode updates for final levels Aravind Gopalakrishnan
2015-08-12 9:38 ` Jan Beulich
2015-08-13 22:51 ` Aravind Gopalakrishnan [this message]
2015-08-20 22:45 ` [PATCH V4 0/2] Update microcode driver Wei Liu
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