From mboxrd@z Thu Jan 1 00:00:00 1970 References: <20150813191157.GG28709@hermes.click-hack.org> From: Jan Kiszka Message-ID: <55CED222.8040901@siemens.com> Date: Sat, 15 Aug 2015 07:46:10 +0200 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Subject: Re: [Xenomai] I-pipe's determinism in handling hardware interrupts when GIC implements "Security Extensions" List-Id: Discussions about the Xenomai project List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Hongfei Cheng , Gilles Chanteperdrix Cc: Xenomai Mailing List On 2015-08-14 22:38, Hongfei Cheng wrote: >> If, like I believe, >> such a "privileged interrupt" is handled by the monitor behind >> Linux/I-pipe's back, then yes, it will break determinism. > > Do you have any suggestion as to how I-pipe can be improved to work > with ARM's multiple exception levels in order to ensure determinism on > ARMv7 (and ARMv8)? Conceptually, this is fairly similar to the SMM on x86. But, in contrast to that arch, we tend to have the firmware sources on ARM. You can check if you actually need the secure monitor on our platform (it's most often used for PSCI) and disable it (may be trickier on ARMv8 where PSCI is mandatory IIRC) or patch it or the kernel to avoid the problematic service calls (specifically CPU power control via PSCI). Jan -- Siemens AG, Corporate Technology, CT RTC ITP SES-DE Corporate Competence Center Embedded Linux