From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37288) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZTkFp-0008Jr-Ds for qemu-devel@nongnu.org; Mon, 24 Aug 2015 01:25:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZTkFk-0006D4-F8 for qemu-devel@nongnu.org; Mon, 24 Aug 2015 01:25:09 -0400 References: <1440327055-29695-1-git-send-email-mark.cave-ayland@ilande.co.uk> From: Alexander Graf Message-ID: <55DAAAAA.1000402@suse.de> Date: Sun, 23 Aug 2015 22:24:58 -0700 MIME-Version: 1.0 In-Reply-To: <1440327055-29695-1-git-send-email-mark.cave-ayland@ilande.co.uk> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH] mac_dbdma: always clear FLUSH bit once DBDMA channel flush is complete List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Mark Cave-Ayland , qemu-devel@nongnu.org, qemu-ppc@nongnu.org, qemu-stable@nongnu.org, jsnow@redhat.com, aurelien@aurel32.net On 23.08.15 03:50, Mark Cave-Ayland wrote: > The code to flush the DBDMA channel was effectively duplicated in > dbdma_control_write(), except for the fact that the copy executed outside of a > RUN bit transition was broken by not clearing the FLUSH bit once the flush was > complete. > > Newer PPC Linux kernels would timeout waiting for the FLUSH bit to clear again > after submitting a FLUSH command. Fix this by always clearing the FLUSH bit > once the channel flush is complete and removing the repeated code. > > Reported-by: Aurelien Jarno > Signed-off-by: Mark Cave-Ayland > Reviewed-by: Aurelien Jarno Thanks, applied to ppc-next. Alex