From: Christopher Covington <cov@codeaurora.org>
To: Peter Maydell <peter.maydell@linaro.org>, qemu-devel@nongnu.org
Cc: Christopher Covington <christopher.covington@linaro.org>,
patches@linaro.org
Subject: Re: [Qemu-devel] [PATCH 0/9] target-arm: Implement A64 semihosting
Date: Tue, 25 Aug 2015 16:40:57 -0400 [thread overview]
Message-ID: <55DCD2D9.6040003@codeaurora.org> (raw)
In-Reply-To: <1439483745-28752-1-git-send-email-peter.maydell@linaro.org>
Hi Peter,
On 08/13/2015 12:35 PM, Peter Maydell wrote:
> This patch series implements support for semihosting for the
> 64-bit ARM instruction set.
>
> It owes a significant debt to the patches sent earlier
> by Christopher Covington (and with code written by Derek Hower).
> However, it is a full from-scratch rewrite (since there were
> several things which I felt those patches didn't take the
> right approach on). I mostly just looked at the earlier
> patches to check I hadn't missed anything.
>
> The changes in the A64 API compared to the A32/T32 one are:
> * input syscall number is in register W0
> * return result is in register X0
> * all argument parameter blocks are 64 bits wide, not 32
> * there is a new SyncCacheRange syscall
> * the SYS_EXIT syscall takes a parameter block and is able
> to pass a guest exit status out
> * the insn used to trigger semihosting is a HLT, not an
> SVC or BKPT.
>
> I've tested this for A32, T32 and A64 semihosting, for
> both usermode and system emulation, with and without gdb
> remote syscalls.
>
> The test code I wrote to do the testing is here:
> https://git.linaro.org/people/peter.maydell/semihosting-tests.git/
> (not very exciting, but might be handy if anybody needs a
> basic "how to run C code starting with bare metal system
> emulation" template.)
>
> The test series also includes a bugfix: we haven't correctly
> forwarded SYS_WRITE0 (print string to terminal) to gdb since
> the gdb hosted syscall support was added to QEMU back in 2007...
Your work on this is greatly appreciated.
Tested-by: Christopher Covington <cov@codeaurora.org>
This works for simple Linux userspace angel-load, angel-store, and angel-exit
utilities as well as at least one newlib/libgloss test. Some more complicated
newlib/libgloss binaries don't run, but that appears to be because of
attempted vbar_el3 accesses.
If it's not much trouble, adding your semihosting tests to kvm-unit-tests
might be nice.
Thanks,
Christopher Covington
--
Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
prev parent reply other threads:[~2015-08-25 20:41 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-08-13 16:35 [Qemu-devel] [PATCH 0/9] target-arm: Implement A64 semihosting Peter Maydell
2015-08-13 16:35 ` [Qemu-devel] [PATCH 1/9] target-arm/arm-semi.c: Fix broken SYS_WRITE0 via gdb Peter Maydell
2015-08-13 16:35 ` [Qemu-devel] [PATCH 2/9] target-arm: Improve semihosting debug prints Peter Maydell
2015-08-13 16:35 ` [Qemu-devel] [PATCH 3/9] gdbstub: Implement gdb_do_syscallv() Peter Maydell
2015-08-13 16:35 ` [Qemu-devel] [PATCH 4/9] target-arm/arm-semi.c: Factor out repeated 'return env->regs[0]' Peter Maydell
2015-08-19 15:52 ` Christopher Covington
2015-08-13 16:35 ` [Qemu-devel] [PATCH 5/9] include/exec/softmmu-semi.h: Add support for 64-bit values Peter Maydell
2015-08-13 16:35 ` [Qemu-devel] [PATCH 6/9] target-arm/arm-semi.c: Support widening APIs to 64 bits Peter Maydell
2015-08-19 20:59 ` Christopher Covington
2015-08-13 16:35 ` [Qemu-devel] [PATCH 7/9] target-arm/arm-semi.c: Implement A64 specific SyncCacheRange call Peter Maydell
2015-08-19 21:01 ` Christopher Covington
2015-08-13 16:35 ` [Qemu-devel] [PATCH 8/9] target-arm/arm-semi.c: SYS_EXIT on A64 takes a parameter block Peter Maydell
2015-08-13 16:35 ` [Qemu-devel] [PATCH 9/9] target-arm: Wire up HLT 0xf000 as the A64 semihosting instruction Peter Maydell
2015-08-19 16:19 ` Christopher Covington
2015-08-27 18:35 ` Peter Maydell
2015-09-14 18:36 ` Christopher Covington
2015-08-25 20:40 ` Christopher Covington [this message]
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