From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54425) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZUXFz-0007zA-Q0 for qemu-devel@nongnu.org; Wed, 26 Aug 2015 05:44:37 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZUXFw-0004ln-Je for qemu-devel@nongnu.org; Wed, 26 Aug 2015 05:44:35 -0400 References: <20150702144406.40bce749@kryten> From: Alexander Graf Message-ID: <55DD8A7E.5080708@suse.de> Date: Wed, 26 Aug 2015 11:44:30 +0200 MIME-Version: 1.0 In-Reply-To: <20150702144406.40bce749@kryten> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] target-ppc: Fix SRR0 when taking unaligned exceptions List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Anton Blanchard Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org On 02.07.15 06:44, Anton Blanchard wrote: > We are setting SRR0 to the instruction before the one causing the > unaligned exception. A quick testcase: > > . = 0x100 > .globl _start > _start: > /* Cause a 0x600 */ > li 3,0x1 > stwcx. 3,0,3 > 1: b 1b > > . = 0x600 > 1: b 1b > > Built into something we can load as a BIOS image: > > gcc -mbig -c test.S > ld -EB -Ttext 0x0 -o test test.o > objcopy -O binary test test.bin > > Run with: > > qemu-system-ppc64 -nographic -bios test.bin > > Shows an incorrect SRR0 (points at the li): > > SRR0 0000000000000100 > > With the patch we get the correct SRR0: > > SRR0 0000000000000104 > > Signed-off-by: Anton Blanchard Thanks, applied to ppc-next. Alex