From: Marc Kleine-Budde <mkl@pengutronix.de>
To: Gerhard Bertelsmann <info@gerhard-bertelsmann.de>
Cc: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>,
Pankajkumar Misra <pankaj.kumar@in.bosch.com>,
linux-can@vger.kernel.org, linux-can-owner@vger.kernel.org
Subject: Re: CAN implementation on A20 Allwinner
Date: Thu, 27 Aug 2015 15:49:52 +0200 [thread overview]
Message-ID: <55DF1580.3070806@pengutronix.de> (raw)
In-Reply-To: <c05ac4c76aad5f8e94cb98960ccfbc43@mail.rdts.de>
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On 08/27/2015 03:34 PM, Gerhard Bertelsmann wrote:
>> Which are the registers that have the upper 24 bit used?
>
> CAN_STA_REG status register
> CAN_BUS_TIME bus timing
> CAN_REC_REG errot counter
That's ok.
> Some regs also have a different address
Which one? How may?
Marc
--
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next prev parent reply other threads:[~2015-08-27 13:49 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-11-27 9:43 Why doesn't the socketcan prio qdisc work for first 10 can frames? Ruan TingQuan (ST-FIR/ENG1-Zhu)
2014-11-27 11:46 ` Oliver Hartkopp
2014-11-27 17:54 ` CAN implementation on A20 Allwinner Pankajkumar Misra (RBEI/EEA2)
2014-11-27 18:28 ` Uwe Bonnes
[not found] ` <58243.88.153.236.115.1417116776.squirrel@webmail.rdts.de>
2014-11-27 19:53 ` Gerhard Bertelsmann
2014-12-02 12:37 ` Marc Kleine-Budde
2015-08-27 13:04 ` Gerhard Bertelsmann
2015-08-27 13:23 ` Marc Kleine-Budde
2015-08-27 13:34 ` Gerhard Bertelsmann
2015-08-27 13:49 ` Marc Kleine-Budde [this message]
2015-08-27 14:29 ` Gerhard Bertelsmann
2015-08-27 14:37 ` Marc Kleine-Budde
2015-08-28 5:41 ` Misra Pankaj Kumar (RBEI/EEA2)
2015-08-28 6:21 ` Marc Kleine-Budde
2015-08-28 9:22 ` Gerhard Bertelsmann
2015-08-28 10:11 ` Marc Kleine-Budde
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