From: Tobias Jakobi <liquid.acid@gmx.net>
To: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>,
Rob Clark <robdclark@gmail.com>
Cc: Jerome Glisse <jglisse@redhat.com>,
linux-samsung-soc <linux-samsung-soc@vger.kernel.org>,
ML dri-devel <dri-devel@lists.freedesktop.org>,
Marek Szyprowski <m.szyprowski@samsung.com>
Subject: Re: drm/exynos: g2d userptr memory corruption
Date: Thu, 27 Aug 2015 19:08:40 +0200 [thread overview]
Message-ID: <55DF4418.2020307@gmx.net> (raw)
In-Reply-To: <f43ace67e1dc3520b6bfe34d0796a69d@math.uni-bielefeld.de>
Tobias Jakobi wrote:
> Next I looked into Jerome's question about whethere the G2D is
> cache coherent with the CPU. I looked into old Android code and
> found FIMG2D_AXI_MODE_REG, a register that currently isn't
> touched in the DRM code.
> It seems to manipulate signals to the AXI Master interface.
>
> The register looks like this:
> [0:3] ARCACHE
> [4:7] AWCACHE
> [8:15] ARUSERS
> [16:23] AWUSERS
> [24:25] MaxBurstLength
Correction, it looks like this:
[0:3] ARCACHE
[4:7] AWCACHE
[8:12] ARUSERS
[16:20] AWUSERS
[24:25] MaxBurstLength
(the rest of the bits are reserved)
With best wishes,
Tobias
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next prev parent reply other threads:[~2015-08-27 17:08 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-08-16 12:48 drm/exynos: g2d userptr memory corruption Tobias Jakobi
2015-08-17 10:26 ` Lucas Stach
2015-08-17 10:26 ` Lucas Stach
2015-08-17 10:26 ` Lucas Stach
2015-08-17 15:41 ` Tobias Jakobi
2015-08-17 15:41 ` Tobias Jakobi
2015-08-19 13:53 ` Tobias Jakobi
2015-08-19 14:08 ` Jerome Glisse
2015-08-19 14:41 ` Rob Clark
2015-08-27 15:10 ` Tobias Jakobi
2015-08-27 17:08 ` Tobias Jakobi [this message]
2015-08-17 15:41 ` Tobias Jakobi
-- strict thread matches above, loose matches on Subject: below --
2015-08-16 12:48 Tobias Jakobi
2015-08-16 12:48 Tobias Jakobi
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