diff for duplicates of <55E0FAC4.2040108@broadcom.com> diff --git a/a/1.txt b/N1/1.txt index beb6c2a..38bf016 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -11,8 +11,8 @@ On 8/28/2015 4:47 PM, Jon Mason wrote: > PL310 L2 Cache > ARM A9 Global timer > -> Signed-off-by: Kapil Hali <kapilh@broadcom.com> -> Signed-off-by: Jon Mason <jonmason@broadcom.com> +> Signed-off-by: Kapil Hali <kapilh-dY08KVG/lbpWk0Htik3J/w@public.gmane.org> +> Signed-off-by: Jon Mason <jonmason-dY08KVG/lbpWk0Htik3J/w@public.gmane.org> > --- > arch/arm/boot/dts/Makefile | 2 + > arch/arm/boot/dts/bcm-nsp.dtsi | 120 +++++++++++++++++++++++++++++++++++++++ @@ -92,7 +92,7 @@ On 8/28/2015 4:47 PM, Jon Mason wrote: > + #address-cells = <1>; > + #size-cells = <0>; > + -> + cpu at 0 { +> + cpu@0 { > + device_type = "cpu"; > + compatible = "arm,cortex-a9"; > + next-level-cache = <&L2>; @@ -107,7 +107,7 @@ On 8/28/2015 4:47 PM, Jon Mason wrote: > + cache-level = <2>; > + }; > + -> + gic: interrupt-controller at 19021000 { +> + gic: interrupt-controller@19021000 { > + compatible = "arm,cortex-a9-gic"; > + #interrupt-cells = <3>; > + #address-cells = <0>; @@ -116,7 +116,7 @@ On 8/28/2015 4:47 PM, Jon Mason wrote: > + <0x0100 0x100>; > + }; > + -> + timer at 19020200 { +> + timer@19020200 { > + compatible = "arm,cortex-a9-global-timer"; > + reg = <0x0200 0x100>; > + interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>; @@ -153,7 +153,7 @@ If so, the size is only 0x1000 and that seems to be too small... > + #address-cells = <1>; > + #size-cells = <1>; > + -> + uart0: serial at 18000300 { +> + uart0: serial@18000300 { > + compatible = "ns16550a"; > + reg = <0x0300 0x100>; > + interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; @@ -161,7 +161,7 @@ If so, the size is only 0x1000 and that seems to be too small... > + status = "disabled"; > + }; > + -> + uart1: serial at 18000400 { +> + uart1: serial@18000400 { > + compatible = "ns16550a"; > + reg = <0x0400 0x100>; > + interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; @@ -233,4 +233,8 @@ If so, the size is only 0x1000 and that seems to be too small... > +&uart1 { > + status = "okay"; > +}; -> +> +-- +To unsubscribe from this list: send the line "unsubscribe devicetree" in +the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org +More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/a/content_digest b/N1/content_digest index cd1e77c..3e33ce8 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,8 +1,23 @@ "ref\01440805644-18241-1-git-send-email-jonmason@broadcom.com\0" - "From\0rjui@broadcom.com (Ray Jui)\0" - "Subject\0[PATCH v3 2/5] ARM: NSP: add minimal Northstar Plus device tree\0" + "ref\01440805644-18241-1-git-send-email-jonmason-dY08KVG/lbpWk0Htik3J/w@public.gmane.org\0" + "From\0Ray Jui <rjui-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>\0" + "Subject\0Re: [PATCH v3 2/5] ARM: NSP: add minimal Northstar Plus device tree\0" "Date\0Fri, 28 Aug 2015 17:20:20 -0700\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0Jon Mason <jonmason-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>" + Olof Johansson <olof-nZhT3qVonbNeoWH0uzbU5w@public.gmane.org> + Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org> + " Kevin Hilman <khilman-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>\0" + "Cc\0Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>" + Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org> + Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org> + Ian Campbell <ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org> + Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> + Florian Fainelli <f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> + devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org + bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w@public.gmane.org + linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + " Kapil Hali <kapilh-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>\0" "\00:1\0" "b\0" "\n" @@ -18,8 +33,8 @@ "> PL310 L2 Cache\n" "> ARM A9 Global timer\n" "> \n" - "> Signed-off-by: Kapil Hali <kapilh@broadcom.com>\n" - "> Signed-off-by: Jon Mason <jonmason@broadcom.com>\n" + "> Signed-off-by: Kapil Hali <kapilh-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>\n" + "> Signed-off-by: Jon Mason <jonmason-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>\n" "> ---\n" "> arch/arm/boot/dts/Makefile | 2 +\n" "> arch/arm/boot/dts/bcm-nsp.dtsi | 120 +++++++++++++++++++++++++++++++++++++++\n" @@ -99,7 +114,7 @@ "> +\t\t\t#address-cells = <1>;\n" "> +\t\t\t#size-cells = <0>;\n" "> +\n" - "> +\t\t\tcpu at 0 {\n" + "> +\t\t\tcpu@0 {\n" "> +\t\t\t\tdevice_type = \"cpu\";\n" "> +\t\t\t\tcompatible = \"arm,cortex-a9\";\n" "> +\t\t\t\tnext-level-cache = <&L2>;\n" @@ -114,7 +129,7 @@ "> +\t\t\tcache-level = <2>;\n" "> +\t\t};\n" "> +\n" - "> +\t\tgic: interrupt-controller at 19021000 {\n" + "> +\t\tgic: interrupt-controller@19021000 {\n" "> +\t\t\tcompatible = \"arm,cortex-a9-gic\";\n" "> +\t\t\t#interrupt-cells = <3>;\n" "> +\t\t\t#address-cells = <0>;\n" @@ -123,7 +138,7 @@ "> +\t\t\t <0x0100 0x100>;\n" "> +\t\t};\n" "> +\n" - "> +\t\ttimer at 19020200 {\n" + "> +\t\ttimer@19020200 {\n" "> +\t\t\tcompatible = \"arm,cortex-a9-global-timer\";\n" "> +\t\t\treg = <0x0200 0x100>;\n" "> +\t\t\tinterrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -160,7 +175,7 @@ "> +\t\t#address-cells = <1>;\n" "> +\t\t#size-cells = <1>;\n" "> +\n" - "> +\t\tuart0: serial at 18000300 {\n" + "> +\t\tuart0: serial@18000300 {\n" "> +\t\t\tcompatible = \"ns16550a\";\n" "> +\t\t\treg = <0x0300 0x100>;\n" "> +\t\t\tinterrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -168,7 +183,7 @@ "> +\t\t\tstatus = \"disabled\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tuart1: serial at 18000400 {\n" + "> +\t\tuart1: serial@18000400 {\n" "> +\t\t\tcompatible = \"ns16550a\";\n" "> +\t\t\treg = <0x0400 0x100>;\n" "> +\t\t\tinterrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -240,6 +255,10 @@ "> +&uart1 {\n" "> +\tstatus = \"okay\";\n" "> +};\n" - > + "> \n" + "--\n" + "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n" + "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n" + More majordomo info at http://vger.kernel.org/majordomo-info.html -5eb7a79189ffa9ac5a3dab5505ba8045bc906b044e3972994853e82318807803 +30d6cca417801695255167bcb1f911514943e98bc2a51fa9bffcaa314dc74fbf
diff --git a/a/1.txt b/N2/1.txt index beb6c2a..50a03ea 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -92,7 +92,7 @@ On 8/28/2015 4:47 PM, Jon Mason wrote: > + #address-cells = <1>; > + #size-cells = <0>; > + -> + cpu at 0 { +> + cpu@0 { > + device_type = "cpu"; > + compatible = "arm,cortex-a9"; > + next-level-cache = <&L2>; @@ -107,7 +107,7 @@ On 8/28/2015 4:47 PM, Jon Mason wrote: > + cache-level = <2>; > + }; > + -> + gic: interrupt-controller at 19021000 { +> + gic: interrupt-controller@19021000 { > + compatible = "arm,cortex-a9-gic"; > + #interrupt-cells = <3>; > + #address-cells = <0>; @@ -116,7 +116,7 @@ On 8/28/2015 4:47 PM, Jon Mason wrote: > + <0x0100 0x100>; > + }; > + -> + timer at 19020200 { +> + timer@19020200 { > + compatible = "arm,cortex-a9-global-timer"; > + reg = <0x0200 0x100>; > + interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>; @@ -153,7 +153,7 @@ If so, the size is only 0x1000 and that seems to be too small... > + #address-cells = <1>; > + #size-cells = <1>; > + -> + uart0: serial at 18000300 { +> + uart0: serial@18000300 { > + compatible = "ns16550a"; > + reg = <0x0300 0x100>; > + interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; @@ -161,7 +161,7 @@ If so, the size is only 0x1000 and that seems to be too small... > + status = "disabled"; > + }; > + -> + uart1: serial at 18000400 { +> + uart1: serial@18000400 { > + compatible = "ns16550a"; > + reg = <0x0400 0x100>; > + interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; diff --git a/a/content_digest b/N2/content_digest index cd1e77c..39c5a13 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,8 +1,22 @@ "ref\01440805644-18241-1-git-send-email-jonmason@broadcom.com\0" - "From\0rjui@broadcom.com (Ray Jui)\0" - "Subject\0[PATCH v3 2/5] ARM: NSP: add minimal Northstar Plus device tree\0" + "From\0Ray Jui <rjui@broadcom.com>\0" + "Subject\0Re: [PATCH v3 2/5] ARM: NSP: add minimal Northstar Plus device tree\0" "Date\0Fri, 28 Aug 2015 17:20:20 -0700\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0Jon Mason <jonmason@broadcom.com>" + Olof Johansson <olof@lixom.net> + Arnd Bergmann <arnd@arndb.de> + " Kevin Hilman <khilman@linaro.org>\0" + "Cc\0Rob Herring <robh+dt@kernel.org>" + Pawel Moll <pawel.moll@arm.com> + Mark Rutland <mark.rutland@arm.com> + Ian Campbell <ijc+devicetree@hellion.org.uk> + Kumar Gala <galak@codeaurora.org> + Florian Fainelli <f.fainelli@gmail.com> + <devicetree@vger.kernel.org> + <linux-arm-kernel@lists.infradead.org> + <bcm-kernel-feedback-list@broadcom.com> + <linux-kernel@vger.kernel.org> + " Kapil Hali <kapilh@broadcom.com>\0" "\00:1\0" "b\0" "\n" @@ -99,7 +113,7 @@ "> +\t\t\t#address-cells = <1>;\n" "> +\t\t\t#size-cells = <0>;\n" "> +\n" - "> +\t\t\tcpu at 0 {\n" + "> +\t\t\tcpu@0 {\n" "> +\t\t\t\tdevice_type = \"cpu\";\n" "> +\t\t\t\tcompatible = \"arm,cortex-a9\";\n" "> +\t\t\t\tnext-level-cache = <&L2>;\n" @@ -114,7 +128,7 @@ "> +\t\t\tcache-level = <2>;\n" "> +\t\t};\n" "> +\n" - "> +\t\tgic: interrupt-controller at 19021000 {\n" + "> +\t\tgic: interrupt-controller@19021000 {\n" "> +\t\t\tcompatible = \"arm,cortex-a9-gic\";\n" "> +\t\t\t#interrupt-cells = <3>;\n" "> +\t\t\t#address-cells = <0>;\n" @@ -123,7 +137,7 @@ "> +\t\t\t <0x0100 0x100>;\n" "> +\t\t};\n" "> +\n" - "> +\t\ttimer at 19020200 {\n" + "> +\t\ttimer@19020200 {\n" "> +\t\t\tcompatible = \"arm,cortex-a9-global-timer\";\n" "> +\t\t\treg = <0x0200 0x100>;\n" "> +\t\t\tinterrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -160,7 +174,7 @@ "> +\t\t#address-cells = <1>;\n" "> +\t\t#size-cells = <1>;\n" "> +\n" - "> +\t\tuart0: serial at 18000300 {\n" + "> +\t\tuart0: serial@18000300 {\n" "> +\t\t\tcompatible = \"ns16550a\";\n" "> +\t\t\treg = <0x0300 0x100>;\n" "> +\t\t\tinterrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -168,7 +182,7 @@ "> +\t\t\tstatus = \"disabled\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tuart1: serial at 18000400 {\n" + "> +\t\tuart1: serial@18000400 {\n" "> +\t\t\tcompatible = \"ns16550a\";\n" "> +\t\t\treg = <0x0400 0x100>;\n" "> +\t\t\tinterrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -242,4 +256,4 @@ "> +};\n" > -5eb7a79189ffa9ac5a3dab5505ba8045bc906b044e3972994853e82318807803 +12104928655974a47ff2f41c590a9d12ae194e972cd999a4b79f4b0bee1278e0
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