diff for duplicates of <55E45A46.7040805@huawei.com> diff --git a/a/1.txt b/N1/1.txt index 09051be..c02e32d 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -5,8 +5,8 @@ On 2015/8/31 21:12, Leo Yan wrote: >> >> Also add dts file to support Hip05-D02 development board. >> ->> Signed-off-by: Ding Tianhong <dingtianhong@huawei.com> ->> Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> +>> Signed-off-by: Ding Tianhong <dingtianhong-hv44wF8Li93QT0dZR+AlfA@public.gmane.org> +>> Signed-off-by: Kefeng Wang <wangkefeng.wang-hv44wF8Li93QT0dZR+AlfA@public.gmane.org> >> --- >> arch/arm64/boot/dts/hisilicon/Makefile | 2 +- >> arch/arm64/boot/dts/hisilicon/hip05-d02.dts | 36 ++++ @@ -50,7 +50,7 @@ On 2015/8/31 21:12, Leo Yan wrote: >> + model = "Hisilicon Hip05 D02 Development Board"; >> + compatible = "hisilicon,hip05-d02"; >> + ->> + memory at 00000000 { +>> + memory@00000000 { >> + device_type = "memory"; >> + reg = <0x0 0x00000000 0x0 0x80000000>; >> + }; @@ -160,118 +160,118 @@ On 2015/8/31 21:12, Leo Yan wrote: >> + }; >> + }; >> + ->> + cpu0: cpu at 20000 { +>> + cpu0: cpu@20000 { >> + device_type = "cpu"; >> + compatible = "arm,armv8"; > > Change to "arm,cortex-a57","arm,armv8"? > -Ok?but I think should be "hisilicon,hip05","arm,armv8". +Ok,but I think should be "hisilicon,hip05","arm,armv8". >> + reg = <0x20000>; >> + enable-method = "psci"; >> + }; >> + ->> + cpu1: cpu at 20001 { +>> + cpu1: cpu@20001 { >> + device_type = "cpu"; >> + compatible = "arm,armv8"; >> + reg = <0x20001>; >> + enable-method = "psci"; >> + }; >> + ->> + cpu2: cpu at 20002 { +>> + cpu2: cpu@20002 { >> + device_type = "cpu"; >> + compatible = "arm,armv8"; >> + reg = <0x20002>; >> + enable-method = "psci"; >> + }; >> + ->> + cpu3: cpu at 20003 { +>> + cpu3: cpu@20003 { >> + device_type = "cpu"; >> + compatible = "arm,armv8"; >> + reg = <0x20003>; >> + enable-method = "psci"; >> + }; >> + ->> + cpu4: cpu at 20100 { +>> + cpu4: cpu@20100 { >> + device_type = "cpu"; >> + compatible = "arm,armv8"; >> + reg = <0x20100>; >> + enable-method = "psci"; >> + }; >> + ->> + cpu5: cpu at 20101 { +>> + cpu5: cpu@20101 { >> + device_type = "cpu"; >> + compatible = "arm,armv8"; >> + reg = <0x20101>; >> + enable-method = "psci"; >> + }; >> + ->> + cpu6: cpu at 20102 { +>> + cpu6: cpu@20102 { >> + device_type = "cpu"; >> + compatible = "arm,armv8"; >> + reg = <0x20102>; >> + enable-method = "psci"; >> + }; >> + ->> + cpu7: cpu at 20103 { +>> + cpu7: cpu@20103 { >> + device_type = "cpu"; >> + compatible = "arm,armv8"; >> + reg = <0x20103>; >> + enable-method = "psci"; >> + }; >> + ->> + cpu8: cpu at 20200 { +>> + cpu8: cpu@20200 { >> + device_type = "cpu"; >> + compatible = "arm,armv8"; >> + reg = <0x20200>; >> + enable-method = "psci"; >> + }; >> + ->> + cpu9: cpu at 20201 { +>> + cpu9: cpu@20201 { >> + device_type = "cpu"; >> + compatible = "arm,armv8"; >> + reg = <0x20201>; >> + enable-method = "psci"; >> + }; >> + ->> + cpu10: cpu at 20202 { +>> + cpu10: cpu@20202 { >> + device_type = "cpu"; >> + compatible = "arm,armv8"; >> + reg = <0x20202>; >> + enable-method = "psci"; >> + }; >> + ->> + cpu11: cpu at 20203 { +>> + cpu11: cpu@20203 { >> + device_type = "cpu"; >> + compatible = "arm,armv8"; >> + reg = <0x20203>; >> + enable-method = "psci"; >> + }; >> + ->> + cpu12: cpu at 20300 { +>> + cpu12: cpu@20300 { >> + device_type = "cpu"; >> + compatible = "arm,armv8"; >> + reg = <0x20300>; >> + enable-method = "psci"; >> + }; >> + ->> + cpu13: cpu at 20301 { +>> + cpu13: cpu@20301 { >> + device_type = "cpu"; >> + compatible = "arm,armv8"; >> + reg = <0x20301>; >> + enable-method = "psci"; >> + }; >> + ->> + cpu14: cpu at 20302 { +>> + cpu14: cpu@20302 { >> + device_type = "cpu"; >> + compatible = "arm,armv8"; >> + reg = <0x20302>; >> + enable-method = "psci"; >> + }; >> + ->> + cpu15: cpu at 20303 { +>> + cpu15: cpu@20303 { >> + device_type = "cpu"; >> + compatible = "arm,armv8"; >> + reg = <0x20303>; @@ -279,7 +279,7 @@ Ok?but I think should be "hisilicon,hip05","arm,armv8". >> + }; >> + }; >> + ->> + gic: interrupt-controller at 8d000000 { +>> + gic: interrupt-controller@8d000000 { >> + compatible = "arm,gic-v3"; >> + #interrupt-cells = <3>; >> + #address-cells = <2>; @@ -295,7 +295,7 @@ Ok?but I think should be "hisilicon,hip05","arm,armv8". >> + <0x0 0xfe020000 0 0x10000>; /* GICV */ >> + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; >> + ->> + its_totems: interrupt-controller at 8c000000 { +>> + its_totems: interrupt-controller@8c000000 { >> + compatible = "arm,gic-v3-its"; >> + msi-controller; >> + reg = <0x0 0x8c000000 0x0 0x1000000>; @@ -338,7 +338,7 @@ Ding >> + clock-frequency = <200000000>; >> + }; >> + ->> + uart0: uart at 80300000 { +>> + uart0: uart@80300000 { >> + compatible = "snps,dw-apb-uart"; >> + reg = <0x0 0x80300000 0x0 0x10000>; >> + interrupts = <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>; @@ -349,7 +349,7 @@ Ding >> + status = "disabled"; >> + }; >> + ->> + uart1: uart at 80310000 { +>> + uart1: uart@80310000 { >> + compatible = "snps,dw-apb-uart"; >> + reg = <0x0 0x80310000 0x0 0x10000>; >> + interrupts = <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; @@ -368,8 +368,14 @@ Ding >> >> _______________________________________________ >> linux-arm-kernel mailing list ->> linux-arm-kernel at lists.infradead.org +>> linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org >> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel > > . -> +> + + +-- +To unsubscribe from this list: send the line "unsubscribe devicetree" in +the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org +More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/a/content_digest b/N1/content_digest index 6cf90ca..8156d29 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,10 +1,26 @@ "ref\01440838361-1468-1-git-send-email-dingtianhong@huawei.com\0" "ref\01440838361-1468-3-git-send-email-dingtianhong@huawei.com\0" "ref\020150831131244.GB6194@leoy-linaro\0" - "From\0dingtianhong@huawei.com (Ding Tianhong)\0" - "Subject\0[PATCH 2/2] arm64: dts: add dts files for Hisilicon Hip05-D02 Development Board\0" + "From\0Ding Tianhong <dingtianhong-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>\0" + "Subject\0Re: [PATCH 2/2] arm64: dts: add dts files for Hisilicon Hip05-D02 Development Board\0" "Date\0Mon, 31 Aug 2015 21:44:38 +0800\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0Leo Yan <leo.yan-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>\0" + "Cc\0linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org" + linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + catalin.marinas-5wv7dgnIgG8@public.gmane.org + will.deacon-5wv7dgnIgG8@public.gmane.org + devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org + pawel.moll-5wv7dgnIgG8@public.gmane.org + mark.rutland-5wv7dgnIgG8@public.gmane.org + marc.zyngier-5wv7dgnIgG8@public.gmane.org + ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org + galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org + rob.herring-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org + haojian.zhuang-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org + zhangfei.gao-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org + xuwei5-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org + " linuxarm-hv44wF8Li93QT0dZR+AlfA@public.gmane.org\0" "\00:1\0" "b\0" "On 2015/8/31 21:12, Leo Yan wrote:\n" @@ -14,8 +30,8 @@ ">>\n" ">> Also add dts file to support Hip05-D02 development board.\n" ">>\n" - ">> Signed-off-by: Ding Tianhong <dingtianhong@huawei.com>\n" - ">> Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>\n" + ">> Signed-off-by: Ding Tianhong <dingtianhong-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>\n" + ">> Signed-off-by: Kefeng Wang <wangkefeng.wang-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>\n" ">> ---\n" ">> arch/arm64/boot/dts/hisilicon/Makefile | 2 +-\n" ">> arch/arm64/boot/dts/hisilicon/hip05-d02.dts | 36 ++++\n" @@ -59,7 +75,7 @@ ">> +\tmodel = \"Hisilicon Hip05 D02 Development Board\";\n" ">> +\tcompatible = \"hisilicon,hip05-d02\";\n" ">> +\n" - ">> +\tmemory at 00000000 {\n" + ">> +\tmemory@00000000 {\n" ">> +\t\tdevice_type = \"memory\";\n" ">> +\t\treg = <0x0 0x00000000 0x0 0x80000000>;\n" ">> +\t};\n" @@ -169,118 +185,118 @@ ">> +\t\t\t};\n" ">> +\t\t};\n" ">> +\n" - ">> +\t\tcpu0: cpu at 20000 {\n" + ">> +\t\tcpu0: cpu@20000 {\n" ">> +\t\t\tdevice_type = \"cpu\";\n" ">> +\t\t\tcompatible = \"arm,armv8\";\n" "> \n" "> Change to \"arm,cortex-a57\",\"arm,armv8\"?\n" "> \n" "\n" - "Ok?but I think should be \"hisilicon,hip05\",\"arm,armv8\".\n" + "Ok\357\274\214but I think should be \"hisilicon,hip05\",\"arm,armv8\".\n" "\n" ">> +\t\t\treg = <0x20000>;\n" ">> +\t\t\tenable-method = \"psci\";\n" ">> +\t\t};\n" ">> +\n" - ">> +\t\tcpu1: cpu at 20001 {\n" + ">> +\t\tcpu1: cpu@20001 {\n" ">> +\t\t\tdevice_type = \"cpu\";\n" ">> +\t\t\tcompatible = \"arm,armv8\";\n" ">> +\t\t\treg = <0x20001>;\n" ">> +\t\t\tenable-method = \"psci\";\n" ">> +\t\t};\n" ">> +\n" - ">> +\t\tcpu2: cpu at 20002 {\n" + ">> +\t\tcpu2: cpu@20002 {\n" ">> +\t\t\tdevice_type = \"cpu\";\n" ">> +\t\t\tcompatible = \"arm,armv8\";\n" ">> +\t\t\treg = <0x20002>;\n" ">> +\t\t\tenable-method = \"psci\";\n" ">> +\t\t};\n" ">> +\n" - ">> +\t\tcpu3: cpu at 20003 {\n" + ">> +\t\tcpu3: cpu@20003 {\n" ">> +\t\t\tdevice_type = \"cpu\";\n" ">> +\t\t\tcompatible = \"arm,armv8\";\n" ">> +\t\t\treg = <0x20003>;\n" ">> +\t\t\tenable-method = \"psci\";\n" ">> +\t\t};\n" ">> +\n" - ">> +\t\tcpu4: cpu at 20100 {\n" + ">> +\t\tcpu4: cpu@20100 {\n" ">> +\t\t\tdevice_type = \"cpu\";\n" ">> +\t\t\tcompatible = \"arm,armv8\";\n" ">> +\t\t\treg = <0x20100>;\n" ">> +\t\t\tenable-method = \"psci\";\n" ">> +\t\t};\n" ">> +\n" - ">> +\t\tcpu5: cpu at 20101 {\n" + ">> +\t\tcpu5: cpu@20101 {\n" ">> +\t\t\tdevice_type = \"cpu\";\n" ">> +\t\t\tcompatible = \"arm,armv8\";\n" ">> +\t\t\treg = <0x20101>;\n" ">> +\t\t\tenable-method = \"psci\";\n" ">> +\t\t};\n" ">> +\n" - ">> +\t\tcpu6: cpu at 20102 {\n" + ">> +\t\tcpu6: cpu@20102 {\n" ">> +\t\t\tdevice_type = \"cpu\";\n" ">> +\t\t\tcompatible = \"arm,armv8\";\n" ">> +\t\t\treg = <0x20102>;\n" ">> +\t\t\tenable-method = \"psci\";\n" ">> +\t\t};\n" ">> +\n" - ">> +\t\tcpu7: cpu at 20103 {\n" + ">> +\t\tcpu7: cpu@20103 {\n" ">> +\t\t\tdevice_type = \"cpu\";\n" ">> +\t\t\tcompatible = \"arm,armv8\";\n" ">> +\t\t\treg = <0x20103>;\n" ">> +\t\t\tenable-method = \"psci\";\n" ">> +\t\t};\n" ">> +\n" - ">> +\t\tcpu8: cpu at 20200 {\n" + ">> +\t\tcpu8: cpu@20200 {\n" ">> +\t\t\tdevice_type = \"cpu\";\n" ">> +\t\t\tcompatible = \"arm,armv8\";\n" ">> +\t\t\treg = <0x20200>;\n" ">> +\t\t\tenable-method = \"psci\";\n" ">> +\t\t};\n" ">> +\n" - ">> +\t\tcpu9: cpu at 20201 {\n" + ">> +\t\tcpu9: cpu@20201 {\n" ">> +\t\t\tdevice_type = \"cpu\";\n" ">> +\t\t\tcompatible = \"arm,armv8\";\n" ">> +\t\t\treg = <0x20201>;\n" ">> +\t\t\tenable-method = \"psci\";\n" ">> +\t\t};\n" ">> +\n" - ">> +\t\tcpu10: cpu at 20202 {\n" + ">> +\t\tcpu10: cpu@20202 {\n" ">> +\t\t\tdevice_type = \"cpu\";\n" ">> +\t\t\tcompatible = \"arm,armv8\";\n" ">> +\t\t\treg = <0x20202>;\n" ">> +\t\t\tenable-method = \"psci\";\n" ">> +\t\t};\n" ">> +\n" - ">> +\t\tcpu11: cpu at 20203 {\n" + ">> +\t\tcpu11: cpu@20203 {\n" ">> +\t\t\tdevice_type = \"cpu\";\n" ">> +\t\t\tcompatible = \"arm,armv8\";\n" ">> +\t\t\treg = <0x20203>;\n" ">> +\t\t\tenable-method = \"psci\";\n" ">> +\t\t};\n" ">> +\n" - ">> +\t\tcpu12: cpu at 20300 {\n" + ">> +\t\tcpu12: cpu@20300 {\n" ">> +\t\t\tdevice_type = \"cpu\";\n" ">> +\t\t\tcompatible = \"arm,armv8\";\n" ">> +\t\t\treg = <0x20300>;\n" ">> +\t\t\tenable-method = \"psci\";\n" ">> +\t\t};\n" ">> +\n" - ">> +\t\tcpu13: cpu at 20301 {\n" + ">> +\t\tcpu13: cpu@20301 {\n" ">> +\t\t\tdevice_type = \"cpu\";\n" ">> +\t\t\tcompatible = \"arm,armv8\";\n" ">> +\t\t\treg = <0x20301>;\n" ">> +\t\t\tenable-method = \"psci\";\n" ">> +\t\t};\n" ">> +\n" - ">> +\t\tcpu14: cpu at 20302 {\n" + ">> +\t\tcpu14: cpu@20302 {\n" ">> +\t\t\tdevice_type = \"cpu\";\n" ">> +\t\t\tcompatible = \"arm,armv8\";\n" ">> +\t\t\treg = <0x20302>;\n" ">> +\t\t\tenable-method = \"psci\";\n" ">> +\t\t};\n" ">> +\n" - ">> +\t\tcpu15: cpu at 20303 {\n" + ">> +\t\tcpu15: cpu@20303 {\n" ">> +\t\t\tdevice_type = \"cpu\";\n" ">> +\t\t\tcompatible = \"arm,armv8\";\n" ">> +\t\t\treg = <0x20303>;\n" @@ -288,7 +304,7 @@ ">> +\t\t};\n" ">> +\t};\n" ">> +\n" - ">> +\tgic: interrupt-controller at 8d000000 {\n" + ">> +\tgic: interrupt-controller@8d000000 {\n" ">> +\t\tcompatible = \"arm,gic-v3\";\n" ">> + #interrupt-cells = <3>;\n" ">> + #address-cells = <2>;\n" @@ -304,7 +320,7 @@ ">> +\t\t <0x0 0xfe020000 0 0x10000>; /* GICV */\n" ">> +\t\tinterrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;\n" ">> +\n" - ">> +\t\tits_totems: interrupt-controller at 8c000000 {\n" + ">> +\t\tits_totems: interrupt-controller@8c000000 {\n" ">> +\t\t\tcompatible = \"arm,gic-v3-its\";\n" ">> +\t\t\tmsi-controller;\n" ">> +\t\t\treg = <0x0 0x8c000000 0x0 0x1000000>;\n" @@ -347,7 +363,7 @@ ">> +\t\t\tclock-frequency = <200000000>;\n" ">> +\t\t};\n" ">> +\n" - ">> +\t\tuart0: uart at 80300000 {\n" + ">> +\t\tuart0: uart@80300000 {\n" ">> +\t\t\tcompatible = \"snps,dw-apb-uart\";\n" ">> +\t\t\treg = <0x0 0x80300000 0x0 0x10000>;\n" ">> +\t\t\tinterrupts = <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -358,7 +374,7 @@ ">> +\t\t\tstatus = \"disabled\";\n" ">> +\t\t};\n" ">> +\n" - ">> +\t\tuart1: uart at 80310000 {\n" + ">> +\t\tuart1: uart@80310000 {\n" ">> +\t\t\tcompatible = \"snps,dw-apb-uart\";\n" ">> +\t\t\treg = <0x0 0x80310000 0x0 0x10000>;\n" ">> +\t\t\tinterrupts = <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -377,10 +393,16 @@ ">>\n" ">> _______________________________________________\n" ">> linux-arm-kernel mailing list\n" - ">> linux-arm-kernel at lists.infradead.org\n" + ">> linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org\n" ">> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel\n" "> \n" "> .\n" - > + "> \n" + "\n" + "\n" + "--\n" + "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n" + "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n" + More majordomo info at http://vger.kernel.org/majordomo-info.html -ef84ba0af069222c570847d32ecfaf30bf144e1cd69de1d81f06e11b332dc710 +f0309cdf74904086d66bfa01d22ae83f876949a6f36ee1ac356f7cfcceab0d64
diff --git a/a/1.txt b/N2/1.txt index 09051be..86836c4 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -50,7 +50,7 @@ On 2015/8/31 21:12, Leo Yan wrote: >> + model = "Hisilicon Hip05 D02 Development Board"; >> + compatible = "hisilicon,hip05-d02"; >> + ->> + memory at 00000000 { +>> + memory@00000000 { >> + device_type = "memory"; >> + reg = <0x0 0x00000000 0x0 0x80000000>; >> + }; @@ -160,118 +160,118 @@ On 2015/8/31 21:12, Leo Yan wrote: >> + }; >> + }; >> + ->> + cpu0: cpu at 20000 { +>> + cpu0: cpu@20000 { >> + device_type = "cpu"; >> + compatible = "arm,armv8"; > > Change to "arm,cortex-a57","arm,armv8"? > -Ok?but I think should be "hisilicon,hip05","arm,armv8". +Ok,but I think should be "hisilicon,hip05","arm,armv8". >> + reg = <0x20000>; >> + enable-method = "psci"; >> + }; >> + ->> + cpu1: cpu at 20001 { +>> + cpu1: cpu@20001 { >> + device_type = "cpu"; >> + compatible = "arm,armv8"; >> + reg = <0x20001>; >> + enable-method = "psci"; >> + }; >> + ->> + cpu2: cpu at 20002 { +>> + cpu2: cpu@20002 { >> + device_type = "cpu"; >> + compatible = "arm,armv8"; >> + reg = <0x20002>; >> + enable-method = "psci"; >> + }; >> + ->> + cpu3: cpu at 20003 { +>> + cpu3: cpu@20003 { >> + device_type = "cpu"; >> + compatible = "arm,armv8"; >> + reg = <0x20003>; >> + enable-method = "psci"; >> + }; >> + ->> + cpu4: cpu at 20100 { +>> + cpu4: cpu@20100 { >> + device_type = "cpu"; >> + compatible = "arm,armv8"; >> + reg = <0x20100>; >> + enable-method = "psci"; >> + }; >> + ->> + cpu5: cpu at 20101 { +>> + cpu5: cpu@20101 { >> + device_type = "cpu"; >> + compatible = "arm,armv8"; >> + reg = <0x20101>; >> + enable-method = "psci"; >> + }; >> + ->> + cpu6: cpu at 20102 { +>> + cpu6: cpu@20102 { >> + device_type = "cpu"; >> + compatible = "arm,armv8"; >> + reg = <0x20102>; >> + enable-method = "psci"; >> + }; >> + ->> + cpu7: cpu at 20103 { +>> + cpu7: cpu@20103 { >> + device_type = "cpu"; >> + compatible = "arm,armv8"; >> + reg = <0x20103>; >> + enable-method = "psci"; >> + }; >> + ->> + cpu8: cpu at 20200 { +>> + cpu8: cpu@20200 { >> + device_type = "cpu"; >> + compatible = "arm,armv8"; >> + reg = <0x20200>; >> + enable-method = "psci"; >> + }; >> + ->> + cpu9: cpu at 20201 { +>> + cpu9: cpu@20201 { >> + device_type = "cpu"; >> + compatible = "arm,armv8"; >> + reg = <0x20201>; >> + enable-method = "psci"; >> + }; >> + ->> + cpu10: cpu at 20202 { +>> + cpu10: cpu@20202 { >> + device_type = "cpu"; >> + compatible = "arm,armv8"; >> + reg = <0x20202>; >> + enable-method = "psci"; >> + }; >> + ->> + cpu11: cpu at 20203 { +>> + cpu11: cpu@20203 { >> + device_type = "cpu"; >> + compatible = "arm,armv8"; >> + reg = <0x20203>; >> + enable-method = "psci"; >> + }; >> + ->> + cpu12: cpu at 20300 { +>> + cpu12: cpu@20300 { >> + device_type = "cpu"; >> + compatible = "arm,armv8"; >> + reg = <0x20300>; >> + enable-method = "psci"; >> + }; >> + ->> + cpu13: cpu at 20301 { +>> + cpu13: cpu@20301 { >> + device_type = "cpu"; >> + compatible = "arm,armv8"; >> + reg = <0x20301>; >> + enable-method = "psci"; >> + }; >> + ->> + cpu14: cpu at 20302 { +>> + cpu14: cpu@20302 { >> + device_type = "cpu"; >> + compatible = "arm,armv8"; >> + reg = <0x20302>; >> + enable-method = "psci"; >> + }; >> + ->> + cpu15: cpu at 20303 { +>> + cpu15: cpu@20303 { >> + device_type = "cpu"; >> + compatible = "arm,armv8"; >> + reg = <0x20303>; @@ -279,7 +279,7 @@ Ok?but I think should be "hisilicon,hip05","arm,armv8". >> + }; >> + }; >> + ->> + gic: interrupt-controller at 8d000000 { +>> + gic: interrupt-controller@8d000000 { >> + compatible = "arm,gic-v3"; >> + #interrupt-cells = <3>; >> + #address-cells = <2>; @@ -295,7 +295,7 @@ Ok?but I think should be "hisilicon,hip05","arm,armv8". >> + <0x0 0xfe020000 0 0x10000>; /* GICV */ >> + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; >> + ->> + its_totems: interrupt-controller at 8c000000 { +>> + its_totems: interrupt-controller@8c000000 { >> + compatible = "arm,gic-v3-its"; >> + msi-controller; >> + reg = <0x0 0x8c000000 0x0 0x1000000>; @@ -338,7 +338,7 @@ Ding >> + clock-frequency = <200000000>; >> + }; >> + ->> + uart0: uart at 80300000 { +>> + uart0: uart@80300000 { >> + compatible = "snps,dw-apb-uart"; >> + reg = <0x0 0x80300000 0x0 0x10000>; >> + interrupts = <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>; @@ -349,7 +349,7 @@ Ding >> + status = "disabled"; >> + }; >> + ->> + uart1: uart at 80310000 { +>> + uart1: uart@80310000 { >> + compatible = "snps,dw-apb-uart"; >> + reg = <0x0 0x80310000 0x0 0x10000>; >> + interrupts = <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; @@ -368,7 +368,7 @@ Ding >> >> _______________________________________________ >> linux-arm-kernel mailing list ->> linux-arm-kernel at lists.infradead.org +>> linux-arm-kernel@lists.infradead.org >> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel > > . diff --git a/a/content_digest b/N2/content_digest index 6cf90ca..7720862 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,10 +1,26 @@ "ref\01440838361-1468-1-git-send-email-dingtianhong@huawei.com\0" "ref\01440838361-1468-3-git-send-email-dingtianhong@huawei.com\0" "ref\020150831131244.GB6194@leoy-linaro\0" - "From\0dingtianhong@huawei.com (Ding Tianhong)\0" - "Subject\0[PATCH 2/2] arm64: dts: add dts files for Hisilicon Hip05-D02 Development Board\0" + "From\0Ding Tianhong <dingtianhong@huawei.com>\0" + "Subject\0Re: [PATCH 2/2] arm64: dts: add dts files for Hisilicon Hip05-D02 Development Board\0" "Date\0Mon, 31 Aug 2015 21:44:38 +0800\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0Leo Yan <leo.yan@linaro.org>\0" + "Cc\0<linux-arm-kernel@lists.infradead.org>" + <linux-kernel@vger.kernel.org> + <catalin.marinas@arm.com> + <will.deacon@arm.com> + <devicetree@vger.kernel.org> + <robh+dt@kernel.org> + <pawel.moll@arm.com> + <mark.rutland@arm.com> + <marc.zyngier@arm.com> + <ijc+devicetree@hellion.org.uk> + <galak@codeaurora.org> + <rob.herring@linaro.org> + <haojian.zhuang@linaro.org> + <zhangfei.gao@linaro.org> + <xuwei5@hisilicon.com> + " <linuxarm@huawei.com>\0" "\00:1\0" "b\0" "On 2015/8/31 21:12, Leo Yan wrote:\n" @@ -59,7 +75,7 @@ ">> +\tmodel = \"Hisilicon Hip05 D02 Development Board\";\n" ">> +\tcompatible = \"hisilicon,hip05-d02\";\n" ">> +\n" - ">> +\tmemory at 00000000 {\n" + ">> +\tmemory@00000000 {\n" ">> +\t\tdevice_type = \"memory\";\n" ">> +\t\treg = <0x0 0x00000000 0x0 0x80000000>;\n" ">> +\t};\n" @@ -169,118 +185,118 @@ ">> +\t\t\t};\n" ">> +\t\t};\n" ">> +\n" - ">> +\t\tcpu0: cpu at 20000 {\n" + ">> +\t\tcpu0: cpu@20000 {\n" ">> +\t\t\tdevice_type = \"cpu\";\n" ">> +\t\t\tcompatible = \"arm,armv8\";\n" "> \n" "> Change to \"arm,cortex-a57\",\"arm,armv8\"?\n" "> \n" "\n" - "Ok?but I think should be \"hisilicon,hip05\",\"arm,armv8\".\n" + "Ok\357\274\214but I think should be \"hisilicon,hip05\",\"arm,armv8\".\n" "\n" ">> +\t\t\treg = <0x20000>;\n" ">> +\t\t\tenable-method = \"psci\";\n" ">> +\t\t};\n" ">> +\n" - ">> +\t\tcpu1: cpu at 20001 {\n" + ">> +\t\tcpu1: cpu@20001 {\n" ">> +\t\t\tdevice_type = \"cpu\";\n" ">> +\t\t\tcompatible = \"arm,armv8\";\n" ">> +\t\t\treg = <0x20001>;\n" ">> +\t\t\tenable-method = \"psci\";\n" ">> +\t\t};\n" ">> +\n" - ">> +\t\tcpu2: cpu at 20002 {\n" + ">> +\t\tcpu2: cpu@20002 {\n" ">> +\t\t\tdevice_type = \"cpu\";\n" ">> +\t\t\tcompatible = \"arm,armv8\";\n" ">> +\t\t\treg = <0x20002>;\n" ">> +\t\t\tenable-method = \"psci\";\n" ">> +\t\t};\n" ">> +\n" - ">> +\t\tcpu3: cpu at 20003 {\n" + ">> +\t\tcpu3: cpu@20003 {\n" ">> +\t\t\tdevice_type = \"cpu\";\n" ">> +\t\t\tcompatible = \"arm,armv8\";\n" ">> +\t\t\treg = <0x20003>;\n" ">> +\t\t\tenable-method = \"psci\";\n" ">> +\t\t};\n" ">> +\n" - ">> +\t\tcpu4: cpu at 20100 {\n" + ">> +\t\tcpu4: cpu@20100 {\n" ">> +\t\t\tdevice_type = \"cpu\";\n" ">> +\t\t\tcompatible = \"arm,armv8\";\n" ">> +\t\t\treg = <0x20100>;\n" ">> +\t\t\tenable-method = \"psci\";\n" ">> +\t\t};\n" ">> +\n" - ">> +\t\tcpu5: cpu at 20101 {\n" + ">> +\t\tcpu5: cpu@20101 {\n" ">> +\t\t\tdevice_type = \"cpu\";\n" ">> +\t\t\tcompatible = \"arm,armv8\";\n" ">> +\t\t\treg = <0x20101>;\n" ">> +\t\t\tenable-method = \"psci\";\n" ">> +\t\t};\n" ">> +\n" - ">> +\t\tcpu6: cpu at 20102 {\n" + ">> +\t\tcpu6: cpu@20102 {\n" ">> +\t\t\tdevice_type = \"cpu\";\n" ">> +\t\t\tcompatible = \"arm,armv8\";\n" ">> +\t\t\treg = <0x20102>;\n" ">> +\t\t\tenable-method = \"psci\";\n" ">> +\t\t};\n" ">> +\n" - ">> +\t\tcpu7: cpu at 20103 {\n" + ">> +\t\tcpu7: cpu@20103 {\n" ">> +\t\t\tdevice_type = \"cpu\";\n" ">> +\t\t\tcompatible = \"arm,armv8\";\n" ">> +\t\t\treg = <0x20103>;\n" ">> +\t\t\tenable-method = \"psci\";\n" ">> +\t\t};\n" ">> +\n" - ">> +\t\tcpu8: cpu at 20200 {\n" + ">> +\t\tcpu8: cpu@20200 {\n" ">> +\t\t\tdevice_type = \"cpu\";\n" ">> +\t\t\tcompatible = \"arm,armv8\";\n" ">> +\t\t\treg = <0x20200>;\n" ">> +\t\t\tenable-method = \"psci\";\n" ">> +\t\t};\n" ">> +\n" - ">> +\t\tcpu9: cpu at 20201 {\n" + ">> +\t\tcpu9: cpu@20201 {\n" ">> +\t\t\tdevice_type = \"cpu\";\n" ">> +\t\t\tcompatible = \"arm,armv8\";\n" ">> +\t\t\treg = <0x20201>;\n" ">> +\t\t\tenable-method = \"psci\";\n" ">> +\t\t};\n" ">> +\n" - ">> +\t\tcpu10: cpu at 20202 {\n" + ">> +\t\tcpu10: cpu@20202 {\n" ">> +\t\t\tdevice_type = \"cpu\";\n" ">> +\t\t\tcompatible = \"arm,armv8\";\n" ">> +\t\t\treg = <0x20202>;\n" ">> +\t\t\tenable-method = \"psci\";\n" ">> +\t\t};\n" ">> +\n" - ">> +\t\tcpu11: cpu at 20203 {\n" + ">> +\t\tcpu11: cpu@20203 {\n" ">> +\t\t\tdevice_type = \"cpu\";\n" ">> +\t\t\tcompatible = \"arm,armv8\";\n" ">> +\t\t\treg = <0x20203>;\n" ">> +\t\t\tenable-method = \"psci\";\n" ">> +\t\t};\n" ">> +\n" - ">> +\t\tcpu12: cpu at 20300 {\n" + ">> +\t\tcpu12: cpu@20300 {\n" ">> +\t\t\tdevice_type = \"cpu\";\n" ">> +\t\t\tcompatible = \"arm,armv8\";\n" ">> +\t\t\treg = <0x20300>;\n" ">> +\t\t\tenable-method = \"psci\";\n" ">> +\t\t};\n" ">> +\n" - ">> +\t\tcpu13: cpu at 20301 {\n" + ">> +\t\tcpu13: cpu@20301 {\n" ">> +\t\t\tdevice_type = \"cpu\";\n" ">> +\t\t\tcompatible = \"arm,armv8\";\n" ">> +\t\t\treg = <0x20301>;\n" ">> +\t\t\tenable-method = \"psci\";\n" ">> +\t\t};\n" ">> +\n" - ">> +\t\tcpu14: cpu at 20302 {\n" + ">> +\t\tcpu14: cpu@20302 {\n" ">> +\t\t\tdevice_type = \"cpu\";\n" ">> +\t\t\tcompatible = \"arm,armv8\";\n" ">> +\t\t\treg = <0x20302>;\n" ">> +\t\t\tenable-method = \"psci\";\n" ">> +\t\t};\n" ">> +\n" - ">> +\t\tcpu15: cpu at 20303 {\n" + ">> +\t\tcpu15: cpu@20303 {\n" ">> +\t\t\tdevice_type = \"cpu\";\n" ">> +\t\t\tcompatible = \"arm,armv8\";\n" ">> +\t\t\treg = <0x20303>;\n" @@ -288,7 +304,7 @@ ">> +\t\t};\n" ">> +\t};\n" ">> +\n" - ">> +\tgic: interrupt-controller at 8d000000 {\n" + ">> +\tgic: interrupt-controller@8d000000 {\n" ">> +\t\tcompatible = \"arm,gic-v3\";\n" ">> + #interrupt-cells = <3>;\n" ">> + #address-cells = <2>;\n" @@ -304,7 +320,7 @@ ">> +\t\t <0x0 0xfe020000 0 0x10000>; /* GICV */\n" ">> +\t\tinterrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;\n" ">> +\n" - ">> +\t\tits_totems: interrupt-controller at 8c000000 {\n" + ">> +\t\tits_totems: interrupt-controller@8c000000 {\n" ">> +\t\t\tcompatible = \"arm,gic-v3-its\";\n" ">> +\t\t\tmsi-controller;\n" ">> +\t\t\treg = <0x0 0x8c000000 0x0 0x1000000>;\n" @@ -347,7 +363,7 @@ ">> +\t\t\tclock-frequency = <200000000>;\n" ">> +\t\t};\n" ">> +\n" - ">> +\t\tuart0: uart at 80300000 {\n" + ">> +\t\tuart0: uart@80300000 {\n" ">> +\t\t\tcompatible = \"snps,dw-apb-uart\";\n" ">> +\t\t\treg = <0x0 0x80300000 0x0 0x10000>;\n" ">> +\t\t\tinterrupts = <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -358,7 +374,7 @@ ">> +\t\t\tstatus = \"disabled\";\n" ">> +\t\t};\n" ">> +\n" - ">> +\t\tuart1: uart at 80310000 {\n" + ">> +\t\tuart1: uart@80310000 {\n" ">> +\t\t\tcompatible = \"snps,dw-apb-uart\";\n" ">> +\t\t\treg = <0x0 0x80310000 0x0 0x10000>;\n" ">> +\t\t\tinterrupts = <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -377,10 +393,10 @@ ">>\n" ">> _______________________________________________\n" ">> linux-arm-kernel mailing list\n" - ">> linux-arm-kernel at lists.infradead.org\n" + ">> linux-arm-kernel@lists.infradead.org\n" ">> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel\n" "> \n" "> .\n" > -ef84ba0af069222c570847d32ecfaf30bf144e1cd69de1d81f06e11b332dc710 +9a43c71943136ced4ea4ac7f860ae650f7c75f7fd1c93af852e4187190ac212f
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