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diff for duplicates of <55E5C401.6090705@broadcom.com>

diff --git a/a/1.txt b/N1/1.txt
index 1f8788a..019455d 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -11,8 +11,8 @@ On 8/31/2015 4:48 PM, Jon Mason wrote:
 > PL310 L2 Cache
 > ARM A9 Global timer
 > 
-> Signed-off-by: Kapil Hali <kapilh@broadcom.com>
-> Signed-off-by: Jon Mason <jonmason@broadcom.com>
+> Signed-off-by: Kapil Hali <kapilh-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
+> Signed-off-by: Jon Mason <jonmason-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
 > ---
 >  arch/arm/boot/dts/Makefile       |   2 +
 >  arch/arm/boot/dts/bcm-nsp.dtsi   | 119 +++++++++++++++++++++++++++++++++++++++
@@ -92,7 +92,7 @@ On 8/31/2015 4:48 PM, Jon Mason wrote:
 > +			#address-cells = <1>;
 > +			#size-cells = <0>;
 > +
-> +			cpu at 0 {
+> +			cpu@0 {
 > +				device_type = "cpu";
 > +				compatible = "arm,cortex-a9";
 > +				next-level-cache = <&L2>;
@@ -107,7 +107,7 @@ On 8/31/2015 4:48 PM, Jon Mason wrote:
 > +			cache-level = <2>;
 > +		};
 > +
-> +		gic: interrupt-controller at 19021000 {
+> +		gic: interrupt-controller@19021000 {
 > +			compatible = "arm,cortex-a9-gic";
 > +			#interrupt-cells = <3>;
 > +			#address-cells = <0>;
@@ -116,7 +116,7 @@ On 8/31/2015 4:48 PM, Jon Mason wrote:
 > +			      <0x0100 0x100>;
 > +		};
 > +
-> +		timer at 19020200 {
+> +		timer@19020200 {
 > +			compatible = "arm,cortex-a9-global-timer";
 > +			reg = <0x0200 0x100>;
 > +			interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
@@ -142,7 +142,7 @@ On 8/31/2015 4:48 PM, Jon Mason wrote:
 > +		#address-cells = <1>;
 > +		#size-cells = <1>;
 > +
-> +		uart0: serial at 18000300 {
+> +		uart0: serial@18000300 {
 > +			compatible = "ns16550a";
 > +			reg = <0x0300 0x100>;
 > +			interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
@@ -150,7 +150,7 @@ On 8/31/2015 4:48 PM, Jon Mason wrote:
 > +			status = "disabled";
 > +		};
 > +
-> +		uart1: serial at 18000400 {
+> +		uart1: serial@18000400 {
 > +			compatible = "ns16550a";
 > +			reg = <0x0400 0x100>;
 > +			interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
@@ -226,8 +226,12 @@ On 8/31/2015 4:48 PM, Jon Mason wrote:
 
 Looks good to me!
 
-Reviewed-by: Ray Jui <rjui@broadcom.com>
+Reviewed-by: Ray Jui <rjui-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
 
 Thanks,
 
 Ray
+--
+To unsubscribe from this list: send the line "unsubscribe devicetree" in
+the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
+More majordomo info at  http://vger.kernel.org/majordomo-info.html
diff --git a/a/content_digest b/N1/content_digest
index 906ee78..7df92d0 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,8 +1,23 @@
  "ref\01441064933-6723-1-git-send-email-jonmason@broadcom.com\0"
- "From\0rjui@broadcom.com (Ray Jui)\0"
- "Subject\0[PATCH v4 2/5] ARM: NSP: add minimal Northstar Plus device tree\0"
+ "ref\01441064933-6723-1-git-send-email-jonmason-dY08KVG/lbpWk0Htik3J/w@public.gmane.org\0"
+ "From\0Ray Jui <rjui-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>\0"
+ "Subject\0Re: [PATCH v4 2/5] ARM: NSP: add minimal Northstar Plus device tree\0"
  "Date\0Tue, 1 Sep 2015 08:28:01 -0700\0"
- "To\0linux-arm-kernel@lists.infradead.org\0"
+ "To\0Jon Mason <jonmason-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>"
+  Olof Johansson <olof-nZhT3qVonbNeoWH0uzbU5w@public.gmane.org>
+  Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org>
+ " Kevin Hilman <khilman-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>\0"
+ "Cc\0Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>"
+  Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org>
+  Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>
+  Ian Campbell <ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org>
+  Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
+  Florian Fainelli <f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
+  devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
+  linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
+  bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w@public.gmane.org
+  linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
+ " Kapil Hali <kapilh-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>\0"
  "\00:1\0"
  "b\0"
  "\n"
@@ -18,8 +33,8 @@
  "> PL310 L2 Cache\n"
  "> ARM A9 Global timer\n"
  "> \n"
- "> Signed-off-by: Kapil Hali <kapilh@broadcom.com>\n"
- "> Signed-off-by: Jon Mason <jonmason@broadcom.com>\n"
+ "> Signed-off-by: Kapil Hali <kapilh-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>\n"
+ "> Signed-off-by: Jon Mason <jonmason-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>\n"
  "> ---\n"
  ">  arch/arm/boot/dts/Makefile       |   2 +\n"
  ">  arch/arm/boot/dts/bcm-nsp.dtsi   | 119 +++++++++++++++++++++++++++++++++++++++\n"
@@ -99,7 +114,7 @@
  "> +\t\t\t#address-cells = <1>;\n"
  "> +\t\t\t#size-cells = <0>;\n"
  "> +\n"
- "> +\t\t\tcpu at 0 {\n"
+ "> +\t\t\tcpu@0 {\n"
  "> +\t\t\t\tdevice_type = \"cpu\";\n"
  "> +\t\t\t\tcompatible = \"arm,cortex-a9\";\n"
  "> +\t\t\t\tnext-level-cache = <&L2>;\n"
@@ -114,7 +129,7 @@
  "> +\t\t\tcache-level = <2>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tgic: interrupt-controller at 19021000 {\n"
+ "> +\t\tgic: interrupt-controller@19021000 {\n"
  "> +\t\t\tcompatible = \"arm,cortex-a9-gic\";\n"
  "> +\t\t\t#interrupt-cells = <3>;\n"
  "> +\t\t\t#address-cells = <0>;\n"
@@ -123,7 +138,7 @@
  "> +\t\t\t      <0x0100 0x100>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\ttimer at 19020200 {\n"
+ "> +\t\ttimer@19020200 {\n"
  "> +\t\t\tcompatible = \"arm,cortex-a9-global-timer\";\n"
  "> +\t\t\treg = <0x0200 0x100>;\n"
  "> +\t\t\tinterrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;\n"
@@ -149,7 +164,7 @@
  "> +\t\t#address-cells = <1>;\n"
  "> +\t\t#size-cells = <1>;\n"
  "> +\n"
- "> +\t\tuart0: serial at 18000300 {\n"
+ "> +\t\tuart0: serial@18000300 {\n"
  "> +\t\t\tcompatible = \"ns16550a\";\n"
  "> +\t\t\treg = <0x0300 0x100>;\n"
  "> +\t\t\tinterrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;\n"
@@ -157,7 +172,7 @@
  "> +\t\t\tstatus = \"disabled\";\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tuart1: serial at 18000400 {\n"
+ "> +\t\tuart1: serial@18000400 {\n"
  "> +\t\t\tcompatible = \"ns16550a\";\n"
  "> +\t\t\treg = <0x0400 0x100>;\n"
  "> +\t\t\tinterrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;\n"
@@ -233,10 +248,14 @@
  "\n"
  "Looks good to me!\n"
  "\n"
- "Reviewed-by: Ray Jui <rjui@broadcom.com>\n"
+ "Reviewed-by: Ray Jui <rjui-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>\n"
  "\n"
  "Thanks,\n"
  "\n"
- Ray
+ "Ray\n"
+ "--\n"
+ "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n"
+ "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n"
+ More majordomo info at  http://vger.kernel.org/majordomo-info.html
 
-3636aa6142b75632ba2a52df5afcfac3eb7928e636f810868eb15dd8242b6c5f
+84381bf43d7efb65db23ace6a47d6ddb7d1d3864855efec6a7ccc8e39db424d0

diff --git a/a/1.txt b/N2/1.txt
index 1f8788a..3f38e4a 100644
--- a/a/1.txt
+++ b/N2/1.txt
@@ -92,7 +92,7 @@ On 8/31/2015 4:48 PM, Jon Mason wrote:
 > +			#address-cells = <1>;
 > +			#size-cells = <0>;
 > +
-> +			cpu at 0 {
+> +			cpu@0 {
 > +				device_type = "cpu";
 > +				compatible = "arm,cortex-a9";
 > +				next-level-cache = <&L2>;
@@ -107,7 +107,7 @@ On 8/31/2015 4:48 PM, Jon Mason wrote:
 > +			cache-level = <2>;
 > +		};
 > +
-> +		gic: interrupt-controller at 19021000 {
+> +		gic: interrupt-controller@19021000 {
 > +			compatible = "arm,cortex-a9-gic";
 > +			#interrupt-cells = <3>;
 > +			#address-cells = <0>;
@@ -116,7 +116,7 @@ On 8/31/2015 4:48 PM, Jon Mason wrote:
 > +			      <0x0100 0x100>;
 > +		};
 > +
-> +		timer at 19020200 {
+> +		timer@19020200 {
 > +			compatible = "arm,cortex-a9-global-timer";
 > +			reg = <0x0200 0x100>;
 > +			interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
@@ -142,7 +142,7 @@ On 8/31/2015 4:48 PM, Jon Mason wrote:
 > +		#address-cells = <1>;
 > +		#size-cells = <1>;
 > +
-> +		uart0: serial at 18000300 {
+> +		uart0: serial@18000300 {
 > +			compatible = "ns16550a";
 > +			reg = <0x0300 0x100>;
 > +			interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
@@ -150,7 +150,7 @@ On 8/31/2015 4:48 PM, Jon Mason wrote:
 > +			status = "disabled";
 > +		};
 > +
-> +		uart1: serial at 18000400 {
+> +		uart1: serial@18000400 {
 > +			compatible = "ns16550a";
 > +			reg = <0x0400 0x100>;
 > +			interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/a/content_digest b/N2/content_digest
index 906ee78..1512be0 100644
--- a/a/content_digest
+++ b/N2/content_digest
@@ -1,8 +1,22 @@
  "ref\01441064933-6723-1-git-send-email-jonmason@broadcom.com\0"
- "From\0rjui@broadcom.com (Ray Jui)\0"
- "Subject\0[PATCH v4 2/5] ARM: NSP: add minimal Northstar Plus device tree\0"
+ "From\0Ray Jui <rjui@broadcom.com>\0"
+ "Subject\0Re: [PATCH v4 2/5] ARM: NSP: add minimal Northstar Plus device tree\0"
  "Date\0Tue, 1 Sep 2015 08:28:01 -0700\0"
- "To\0linux-arm-kernel@lists.infradead.org\0"
+ "To\0Jon Mason <jonmason@broadcom.com>"
+  Olof Johansson <olof@lixom.net>
+  Arnd Bergmann <arnd@arndb.de>
+ " Kevin Hilman <khilman@linaro.org>\0"
+ "Cc\0Rob Herring <robh+dt@kernel.org>"
+  Pawel Moll <pawel.moll@arm.com>
+  Mark Rutland <mark.rutland@arm.com>
+  Ian Campbell <ijc+devicetree@hellion.org.uk>
+  Kumar Gala <galak@codeaurora.org>
+  Florian Fainelli <f.fainelli@gmail.com>
+  <devicetree@vger.kernel.org>
+  <linux-arm-kernel@lists.infradead.org>
+  <bcm-kernel-feedback-list@broadcom.com>
+  <linux-kernel@vger.kernel.org>
+ " Kapil Hali <kapilh@broadcom.com>\0"
  "\00:1\0"
  "b\0"
  "\n"
@@ -99,7 +113,7 @@
  "> +\t\t\t#address-cells = <1>;\n"
  "> +\t\t\t#size-cells = <0>;\n"
  "> +\n"
- "> +\t\t\tcpu at 0 {\n"
+ "> +\t\t\tcpu@0 {\n"
  "> +\t\t\t\tdevice_type = \"cpu\";\n"
  "> +\t\t\t\tcompatible = \"arm,cortex-a9\";\n"
  "> +\t\t\t\tnext-level-cache = <&L2>;\n"
@@ -114,7 +128,7 @@
  "> +\t\t\tcache-level = <2>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tgic: interrupt-controller at 19021000 {\n"
+ "> +\t\tgic: interrupt-controller@19021000 {\n"
  "> +\t\t\tcompatible = \"arm,cortex-a9-gic\";\n"
  "> +\t\t\t#interrupt-cells = <3>;\n"
  "> +\t\t\t#address-cells = <0>;\n"
@@ -123,7 +137,7 @@
  "> +\t\t\t      <0x0100 0x100>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\ttimer at 19020200 {\n"
+ "> +\t\ttimer@19020200 {\n"
  "> +\t\t\tcompatible = \"arm,cortex-a9-global-timer\";\n"
  "> +\t\t\treg = <0x0200 0x100>;\n"
  "> +\t\t\tinterrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;\n"
@@ -149,7 +163,7 @@
  "> +\t\t#address-cells = <1>;\n"
  "> +\t\t#size-cells = <1>;\n"
  "> +\n"
- "> +\t\tuart0: serial at 18000300 {\n"
+ "> +\t\tuart0: serial@18000300 {\n"
  "> +\t\t\tcompatible = \"ns16550a\";\n"
  "> +\t\t\treg = <0x0300 0x100>;\n"
  "> +\t\t\tinterrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;\n"
@@ -157,7 +171,7 @@
  "> +\t\t\tstatus = \"disabled\";\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tuart1: serial at 18000400 {\n"
+ "> +\t\tuart1: serial@18000400 {\n"
  "> +\t\t\tcompatible = \"ns16550a\";\n"
  "> +\t\t\treg = <0x0400 0x100>;\n"
  "> +\t\t\tinterrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;\n"
@@ -239,4 +253,4 @@
  "\n"
  Ray
 
-3636aa6142b75632ba2a52df5afcfac3eb7928e636f810868eb15dd8242b6c5f
+440fdc845e12c64edbddfdaa3039f179c40b525f25022a510c6b1c68effbbcea

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