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diff for duplicates of <55E6B154.1000704@huawei.com>

diff --git a/a/1.txt b/N1/1.txt
index 4373187..e782c5f 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -2,7 +2,7 @@ On 2015/9/2 15:58, Marc Zyngier wrote:
 > [Don't top-post, this is very annoying]
 > 
 > On 02/09/15 05:28, Ding Tianhong wrote:
->> Hi?Marc?
+>> Hi,Marc:
 >>
 >> Can you check this, I am not sure whether the GIC_CPU_MASK_SIMPLE(xx)
 >> is used for gic-v3, maybe we should remove it, thanks.
@@ -83,7 +83,7 @@ Ding
 >>>>> +	model = "Hisilicon Hip05 D02 Development Board";
 >>>>> +	compatible = "hisilicon,hip05-d02";
 >>>>> +
->>>>> +	memory at 00000000 {
+>>>>> +	memory@00000000 {
 >>>>> +		device_type = "memory";
 >>>>> +		reg = <0x0 0x00000000 0x0 0x80000000>;
 >>>>> +	};
@@ -193,118 +193,118 @@ Ding
 >>>>> +			};
 >>>>> +		};
 >>>>> +
->>>>> +		cpu0: cpu at 20000 {
+>>>>> +		cpu0: cpu@20000 {
 >>>>> +			device_type = "cpu";
 >>>>> +			compatible = "arm,armv8";
 >>>>
 >>>> Change to "arm,cortex-a57","arm,armv8"?
 >>>>
 >>>
->>> Ok?but I think should be "hisilicon,hip05","arm,armv8".
+>>> Ok,but I think should be "hisilicon,hip05","arm,armv8".
 >>>
 >>>>> +			reg = <0x20000>;
 >>>>> +			enable-method = "psci";
 >>>>> +		};
 >>>>> +
->>>>> +		cpu1: cpu at 20001 {
+>>>>> +		cpu1: cpu@20001 {
 >>>>> +			device_type = "cpu";
 >>>>> +			compatible = "arm,armv8";
 >>>>> +			reg = <0x20001>;
 >>>>> +			enable-method = "psci";
 >>>>> +		};
 >>>>> +
->>>>> +		cpu2: cpu at 20002 {
+>>>>> +		cpu2: cpu@20002 {
 >>>>> +			device_type = "cpu";
 >>>>> +			compatible = "arm,armv8";
 >>>>> +			reg = <0x20002>;
 >>>>> +			enable-method = "psci";
 >>>>> +		};
 >>>>> +
->>>>> +		cpu3: cpu at 20003 {
+>>>>> +		cpu3: cpu@20003 {
 >>>>> +			device_type = "cpu";
 >>>>> +			compatible = "arm,armv8";
 >>>>> +			reg = <0x20003>;
 >>>>> +			enable-method = "psci";
 >>>>> +		};
 >>>>> +
->>>>> +		cpu4: cpu at 20100 {
+>>>>> +		cpu4: cpu@20100 {
 >>>>> +			device_type = "cpu";
 >>>>> +			compatible = "arm,armv8";
 >>>>> +			reg = <0x20100>;
 >>>>> +			enable-method = "psci";
 >>>>> +		};
 >>>>> +
->>>>> +		cpu5: cpu at 20101 {
+>>>>> +		cpu5: cpu@20101 {
 >>>>> +			device_type = "cpu";
 >>>>> +			compatible = "arm,armv8";
 >>>>> +			reg = <0x20101>;
 >>>>> +			enable-method = "psci";
 >>>>> +		};
 >>>>> +
->>>>> +		cpu6: cpu at 20102 {
+>>>>> +		cpu6: cpu@20102 {
 >>>>> +			device_type = "cpu";
 >>>>> +			compatible = "arm,armv8";
 >>>>> +			reg = <0x20102>;
 >>>>> +			enable-method = "psci";
 >>>>> +		};
 >>>>> +
->>>>> +		cpu7: cpu at 20103 {
+>>>>> +		cpu7: cpu@20103 {
 >>>>> +			device_type = "cpu";
 >>>>> +			compatible = "arm,armv8";
 >>>>> +			reg = <0x20103>;
 >>>>> +			enable-method = "psci";
 >>>>> +		};
 >>>>> +
->>>>> +		cpu8: cpu at 20200 {
+>>>>> +		cpu8: cpu@20200 {
 >>>>> +			device_type = "cpu";
 >>>>> +			compatible = "arm,armv8";
 >>>>> +			reg = <0x20200>;
 >>>>> +			enable-method = "psci";
 >>>>> +		};
 >>>>> +
->>>>> +		cpu9: cpu at 20201 {
+>>>>> +		cpu9: cpu@20201 {
 >>>>> +			device_type = "cpu";
 >>>>> +			compatible = "arm,armv8";
 >>>>> +			reg = <0x20201>;
 >>>>> +			enable-method = "psci";
 >>>>> +		};
 >>>>> +
->>>>> +		cpu10: cpu at 20202 {
+>>>>> +		cpu10: cpu@20202 {
 >>>>> +			device_type = "cpu";
 >>>>> +			compatible = "arm,armv8";
 >>>>> +			reg = <0x20202>;
 >>>>> +			enable-method = "psci";
 >>>>> +		};
 >>>>> +
->>>>> +		cpu11: cpu at 20203 {
+>>>>> +		cpu11: cpu@20203 {
 >>>>> +			device_type = "cpu";
 >>>>> +			compatible = "arm,armv8";
 >>>>> +			reg = <0x20203>;
 >>>>> +			enable-method = "psci";
 >>>>> +		};
 >>>>> +
->>>>> +		cpu12: cpu at 20300 {
+>>>>> +		cpu12: cpu@20300 {
 >>>>> +			device_type = "cpu";
 >>>>> +			compatible = "arm,armv8";
 >>>>> +			reg = <0x20300>;
 >>>>> +			enable-method = "psci";
 >>>>> +		};
 >>>>> +
->>>>> +		cpu13: cpu at 20301 {
+>>>>> +		cpu13: cpu@20301 {
 >>>>> +			device_type = "cpu";
 >>>>> +			compatible = "arm,armv8";
 >>>>> +			reg = <0x20301>;
 >>>>> +			enable-method = "psci";
 >>>>> +		};
 >>>>> +
->>>>> +		cpu14: cpu at 20302 {
+>>>>> +		cpu14: cpu@20302 {
 >>>>> +			device_type = "cpu";
 >>>>> +			compatible = "arm,armv8";
 >>>>> +			reg = <0x20302>;
 >>>>> +			enable-method = "psci";
 >>>>> +		};
 >>>>> +
->>>>> +		cpu15: cpu at 20303 {
+>>>>> +		cpu15: cpu@20303 {
 >>>>> +			device_type = "cpu";
 >>>>> +			compatible = "arm,armv8";
 >>>>> +			reg = <0x20303>;
@@ -312,7 +312,7 @@ Ding
 >>>>> +		};
 >>>>> +	};
 >>>>> +
->>>>> +	gic: interrupt-controller at 8d000000 {
+>>>>> +	gic: interrupt-controller@8d000000 {
 >>>>> +		compatible = "arm,gic-v3";
 >>>>> +                #interrupt-cells = <3>;
 >>>>> +                #address-cells = <2>;
@@ -328,7 +328,7 @@ Ding
 >>>>> +		      <0x0 0xfe020000 0 0x10000>;       /* GICV */
 >>>>> +		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
 >>>>> +
->>>>> +		its_totems: interrupt-controller at 8c000000 {
+>>>>> +		its_totems: interrupt-controller@8c000000 {
 >>>>> +			compatible = "arm,gic-v3-its";
 >>>>> +			msi-controller;
 >>>>> +			reg = <0x0 0x8c000000 0x0 0x1000000>;
@@ -371,7 +371,7 @@ Ding
 >>>>> +			clock-frequency = <200000000>;
 >>>>> +		};
 >>>>> +
->>>>> +		uart0: uart at 80300000 {
+>>>>> +		uart0: uart@80300000 {
 >>>>> +			compatible = "snps,dw-apb-uart";
 >>>>> +			reg = <0x0 0x80300000 0x0 0x10000>;
 >>>>> +			interrupts = <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>;
@@ -382,7 +382,7 @@ Ding
 >>>>> +			status = "disabled";
 >>>>> +		};
 >>>>> +
->>>>> +		uart1: uart at 80310000 {
+>>>>> +		uart1: uart@80310000 {
 >>>>> +			compatible = "snps,dw-apb-uart";
 >>>>> +			reg = <0x0 0x80310000 0x0 0x10000>;
 >>>>> +			interrupts = <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
@@ -401,7 +401,7 @@ Ding
 >>>>>
 >>>>> _______________________________________________
 >>>>> linux-arm-kernel mailing list
->>>>> linux-arm-kernel at lists.infradead.org
+>>>>> linux-arm-kernel@lists.infradead.org
 >>>>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
 >>>>
 >>>> .
@@ -410,7 +410,7 @@ Ding
 >>>
 >>> _______________________________________________
 >>> linuxarm mailing list
->>> linuxarm at huawei.com
+>>> linuxarm@huawei.com
 >>> http://rnd-openeuler.huawei.com/mailman/listinfo/linuxarm
 >>>
 >>
diff --git a/a/content_digest b/N1/content_digest
index 320de47..8c478f3 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -4,17 +4,32 @@
  "ref\055E45A46.7040805@huawei.com\0"
  "ref\055E67AD1.2010405@huawei.com\0"
  "ref\055E6AC08.4000302@arm.com\0"
- "From\0dingtianhong@huawei.com (Ding Tianhong)\0"
- "Subject\0[PATCH 2/2] arm64: dts: add dts files for Hisilicon Hip05-D02 Development Board\0"
+ "From\0Ding Tianhong <dingtianhong@huawei.com>\0"
+ "Subject\0Re: [PATCH 2/2] arm64: dts: add dts files for Hisilicon Hip05-D02 Development Board\0"
  "Date\0Wed, 2 Sep 2015 16:20:36 +0800\0"
- "To\0linux-arm-kernel@lists.infradead.org\0"
+ "To\0Marc Zyngier <marc.zyngier@arm.com>"
+ " Leo Yan <leo.yan@linaro.org>\0"
+ "Cc\0mark.rutland@arm.com"
+  devicetree@vger.kernel.org
+  pawel.moll@arm.com
+  ijc+devicetree@hellion.org.uk
+  catalin.marinas@arm.com
+  will.deacon@arm.com
+  linux-kernel@vger.kernel.org
+  linuxarm@huawei.com
+  robh+dt@kernel.org
+  haojian.zhuang@linaro.org
+  galak@codeaurora.org
+  zhangfei.gao@linaro.org
+  rob.herring@linaro.org
+ " linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
  "On 2015/9/2 15:58, Marc Zyngier wrote:\n"
  "> [Don't top-post, this is very annoying]\n"
  "> \n"
  "> On 02/09/15 05:28, Ding Tianhong wrote:\n"
- ">> Hi?Marc?\n"
+ ">> Hi\357\274\214Marc\357\274\232\n"
  ">>\n"
  ">> Can you check this, I am not sure whether the GIC_CPU_MASK_SIMPLE(xx)\n"
  ">> is used for gic-v3, maybe we should remove it, thanks.\n"
@@ -95,7 +110,7 @@
  ">>>>> +\tmodel = \"Hisilicon Hip05 D02 Development Board\";\n"
  ">>>>> +\tcompatible = \"hisilicon,hip05-d02\";\n"
  ">>>>> +\n"
- ">>>>> +\tmemory at 00000000 {\n"
+ ">>>>> +\tmemory@00000000 {\n"
  ">>>>> +\t\tdevice_type = \"memory\";\n"
  ">>>>> +\t\treg = <0x0 0x00000000 0x0 0x80000000>;\n"
  ">>>>> +\t};\n"
@@ -205,118 +220,118 @@
  ">>>>> +\t\t\t};\n"
  ">>>>> +\t\t};\n"
  ">>>>> +\n"
- ">>>>> +\t\tcpu0: cpu at 20000 {\n"
+ ">>>>> +\t\tcpu0: cpu@20000 {\n"
  ">>>>> +\t\t\tdevice_type = \"cpu\";\n"
  ">>>>> +\t\t\tcompatible = \"arm,armv8\";\n"
  ">>>>\n"
  ">>>> Change to \"arm,cortex-a57\",\"arm,armv8\"?\n"
  ">>>>\n"
  ">>>\n"
- ">>> Ok?but I think should be \"hisilicon,hip05\",\"arm,armv8\".\n"
+ ">>> Ok\357\274\214but I think should be \"hisilicon,hip05\",\"arm,armv8\".\n"
  ">>>\n"
  ">>>>> +\t\t\treg = <0x20000>;\n"
  ">>>>> +\t\t\tenable-method = \"psci\";\n"
  ">>>>> +\t\t};\n"
  ">>>>> +\n"
- ">>>>> +\t\tcpu1: cpu at 20001 {\n"
+ ">>>>> +\t\tcpu1: cpu@20001 {\n"
  ">>>>> +\t\t\tdevice_type = \"cpu\";\n"
  ">>>>> +\t\t\tcompatible = \"arm,armv8\";\n"
  ">>>>> +\t\t\treg = <0x20001>;\n"
  ">>>>> +\t\t\tenable-method = \"psci\";\n"
  ">>>>> +\t\t};\n"
  ">>>>> +\n"
- ">>>>> +\t\tcpu2: cpu at 20002 {\n"
+ ">>>>> +\t\tcpu2: cpu@20002 {\n"
  ">>>>> +\t\t\tdevice_type = \"cpu\";\n"
  ">>>>> +\t\t\tcompatible = \"arm,armv8\";\n"
  ">>>>> +\t\t\treg = <0x20002>;\n"
  ">>>>> +\t\t\tenable-method = \"psci\";\n"
  ">>>>> +\t\t};\n"
  ">>>>> +\n"
- ">>>>> +\t\tcpu3: cpu at 20003 {\n"
+ ">>>>> +\t\tcpu3: cpu@20003 {\n"
  ">>>>> +\t\t\tdevice_type = \"cpu\";\n"
  ">>>>> +\t\t\tcompatible = \"arm,armv8\";\n"
  ">>>>> +\t\t\treg = <0x20003>;\n"
  ">>>>> +\t\t\tenable-method = \"psci\";\n"
  ">>>>> +\t\t};\n"
  ">>>>> +\n"
- ">>>>> +\t\tcpu4: cpu at 20100 {\n"
+ ">>>>> +\t\tcpu4: cpu@20100 {\n"
  ">>>>> +\t\t\tdevice_type = \"cpu\";\n"
  ">>>>> +\t\t\tcompatible = \"arm,armv8\";\n"
  ">>>>> +\t\t\treg = <0x20100>;\n"
  ">>>>> +\t\t\tenable-method = \"psci\";\n"
  ">>>>> +\t\t};\n"
  ">>>>> +\n"
- ">>>>> +\t\tcpu5: cpu at 20101 {\n"
+ ">>>>> +\t\tcpu5: cpu@20101 {\n"
  ">>>>> +\t\t\tdevice_type = \"cpu\";\n"
  ">>>>> +\t\t\tcompatible = \"arm,armv8\";\n"
  ">>>>> +\t\t\treg = <0x20101>;\n"
  ">>>>> +\t\t\tenable-method = \"psci\";\n"
  ">>>>> +\t\t};\n"
  ">>>>> +\n"
- ">>>>> +\t\tcpu6: cpu at 20102 {\n"
+ ">>>>> +\t\tcpu6: cpu@20102 {\n"
  ">>>>> +\t\t\tdevice_type = \"cpu\";\n"
  ">>>>> +\t\t\tcompatible = \"arm,armv8\";\n"
  ">>>>> +\t\t\treg = <0x20102>;\n"
  ">>>>> +\t\t\tenable-method = \"psci\";\n"
  ">>>>> +\t\t};\n"
  ">>>>> +\n"
- ">>>>> +\t\tcpu7: cpu at 20103 {\n"
+ ">>>>> +\t\tcpu7: cpu@20103 {\n"
  ">>>>> +\t\t\tdevice_type = \"cpu\";\n"
  ">>>>> +\t\t\tcompatible = \"arm,armv8\";\n"
  ">>>>> +\t\t\treg = <0x20103>;\n"
  ">>>>> +\t\t\tenable-method = \"psci\";\n"
  ">>>>> +\t\t};\n"
  ">>>>> +\n"
- ">>>>> +\t\tcpu8: cpu at 20200 {\n"
+ ">>>>> +\t\tcpu8: cpu@20200 {\n"
  ">>>>> +\t\t\tdevice_type = \"cpu\";\n"
  ">>>>> +\t\t\tcompatible = \"arm,armv8\";\n"
  ">>>>> +\t\t\treg = <0x20200>;\n"
  ">>>>> +\t\t\tenable-method = \"psci\";\n"
  ">>>>> +\t\t};\n"
  ">>>>> +\n"
- ">>>>> +\t\tcpu9: cpu at 20201 {\n"
+ ">>>>> +\t\tcpu9: cpu@20201 {\n"
  ">>>>> +\t\t\tdevice_type = \"cpu\";\n"
  ">>>>> +\t\t\tcompatible = \"arm,armv8\";\n"
  ">>>>> +\t\t\treg = <0x20201>;\n"
  ">>>>> +\t\t\tenable-method = \"psci\";\n"
  ">>>>> +\t\t};\n"
  ">>>>> +\n"
- ">>>>> +\t\tcpu10: cpu at 20202 {\n"
+ ">>>>> +\t\tcpu10: cpu@20202 {\n"
  ">>>>> +\t\t\tdevice_type = \"cpu\";\n"
  ">>>>> +\t\t\tcompatible = \"arm,armv8\";\n"
  ">>>>> +\t\t\treg = <0x20202>;\n"
  ">>>>> +\t\t\tenable-method = \"psci\";\n"
  ">>>>> +\t\t};\n"
  ">>>>> +\n"
- ">>>>> +\t\tcpu11: cpu at 20203 {\n"
+ ">>>>> +\t\tcpu11: cpu@20203 {\n"
  ">>>>> +\t\t\tdevice_type = \"cpu\";\n"
  ">>>>> +\t\t\tcompatible = \"arm,armv8\";\n"
  ">>>>> +\t\t\treg = <0x20203>;\n"
  ">>>>> +\t\t\tenable-method = \"psci\";\n"
  ">>>>> +\t\t};\n"
  ">>>>> +\n"
- ">>>>> +\t\tcpu12: cpu at 20300 {\n"
+ ">>>>> +\t\tcpu12: cpu@20300 {\n"
  ">>>>> +\t\t\tdevice_type = \"cpu\";\n"
  ">>>>> +\t\t\tcompatible = \"arm,armv8\";\n"
  ">>>>> +\t\t\treg = <0x20300>;\n"
  ">>>>> +\t\t\tenable-method = \"psci\";\n"
  ">>>>> +\t\t};\n"
  ">>>>> +\n"
- ">>>>> +\t\tcpu13: cpu at 20301 {\n"
+ ">>>>> +\t\tcpu13: cpu@20301 {\n"
  ">>>>> +\t\t\tdevice_type = \"cpu\";\n"
  ">>>>> +\t\t\tcompatible = \"arm,armv8\";\n"
  ">>>>> +\t\t\treg = <0x20301>;\n"
  ">>>>> +\t\t\tenable-method = \"psci\";\n"
  ">>>>> +\t\t};\n"
  ">>>>> +\n"
- ">>>>> +\t\tcpu14: cpu at 20302 {\n"
+ ">>>>> +\t\tcpu14: cpu@20302 {\n"
  ">>>>> +\t\t\tdevice_type = \"cpu\";\n"
  ">>>>> +\t\t\tcompatible = \"arm,armv8\";\n"
  ">>>>> +\t\t\treg = <0x20302>;\n"
  ">>>>> +\t\t\tenable-method = \"psci\";\n"
  ">>>>> +\t\t};\n"
  ">>>>> +\n"
- ">>>>> +\t\tcpu15: cpu at 20303 {\n"
+ ">>>>> +\t\tcpu15: cpu@20303 {\n"
  ">>>>> +\t\t\tdevice_type = \"cpu\";\n"
  ">>>>> +\t\t\tcompatible = \"arm,armv8\";\n"
  ">>>>> +\t\t\treg = <0x20303>;\n"
@@ -324,7 +339,7 @@
  ">>>>> +\t\t};\n"
  ">>>>> +\t};\n"
  ">>>>> +\n"
- ">>>>> +\tgic: interrupt-controller at 8d000000 {\n"
+ ">>>>> +\tgic: interrupt-controller@8d000000 {\n"
  ">>>>> +\t\tcompatible = \"arm,gic-v3\";\n"
  ">>>>> +                #interrupt-cells = <3>;\n"
  ">>>>> +                #address-cells = <2>;\n"
@@ -340,7 +355,7 @@
  ">>>>> +\t\t      <0x0 0xfe020000 0 0x10000>;       /* GICV */\n"
  ">>>>> +\t\tinterrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;\n"
  ">>>>> +\n"
- ">>>>> +\t\tits_totems: interrupt-controller at 8c000000 {\n"
+ ">>>>> +\t\tits_totems: interrupt-controller@8c000000 {\n"
  ">>>>> +\t\t\tcompatible = \"arm,gic-v3-its\";\n"
  ">>>>> +\t\t\tmsi-controller;\n"
  ">>>>> +\t\t\treg = <0x0 0x8c000000 0x0 0x1000000>;\n"
@@ -383,7 +398,7 @@
  ">>>>> +\t\t\tclock-frequency = <200000000>;\n"
  ">>>>> +\t\t};\n"
  ">>>>> +\n"
- ">>>>> +\t\tuart0: uart at 80300000 {\n"
+ ">>>>> +\t\tuart0: uart@80300000 {\n"
  ">>>>> +\t\t\tcompatible = \"snps,dw-apb-uart\";\n"
  ">>>>> +\t\t\treg = <0x0 0x80300000 0x0 0x10000>;\n"
  ">>>>> +\t\t\tinterrupts = <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>;\n"
@@ -394,7 +409,7 @@
  ">>>>> +\t\t\tstatus = \"disabled\";\n"
  ">>>>> +\t\t};\n"
  ">>>>> +\n"
- ">>>>> +\t\tuart1: uart at 80310000 {\n"
+ ">>>>> +\t\tuart1: uart@80310000 {\n"
  ">>>>> +\t\t\tcompatible = \"snps,dw-apb-uart\";\n"
  ">>>>> +\t\t\treg = <0x0 0x80310000 0x0 0x10000>;\n"
  ">>>>> +\t\t\tinterrupts = <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;\n"
@@ -413,7 +428,7 @@
  ">>>>>\n"
  ">>>>> _______________________________________________\n"
  ">>>>> linux-arm-kernel mailing list\n"
- ">>>>> linux-arm-kernel at lists.infradead.org\n"
+ ">>>>> linux-arm-kernel@lists.infradead.org\n"
  ">>>>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel\n"
  ">>>>\n"
  ">>>> .\n"
@@ -422,7 +437,7 @@
  ">>>\n"
  ">>> _______________________________________________\n"
  ">>> linuxarm mailing list\n"
- ">>> linuxarm at huawei.com\n"
+ ">>> linuxarm@huawei.com\n"
  ">>> http://rnd-openeuler.huawei.com/mailman/listinfo/linuxarm\n"
  ">>>\n"
  ">>\n"
@@ -430,4 +445,4 @@
  "> \n"
  >
 
-5dcc86027e0db6fa7e83fd109c0a2bda6eaf0d7d4fe3498c3bb20fadb1f05c86
+d11bc35295a885aca8991e4355e35740f45d6beabac51e904ccf72888a9e747b

diff --git a/a/1.txt b/N2/1.txt
index 4373187..e782c5f 100644
--- a/a/1.txt
+++ b/N2/1.txt
@@ -2,7 +2,7 @@ On 2015/9/2 15:58, Marc Zyngier wrote:
 > [Don't top-post, this is very annoying]
 > 
 > On 02/09/15 05:28, Ding Tianhong wrote:
->> Hi?Marc?
+>> Hi,Marc:
 >>
 >> Can you check this, I am not sure whether the GIC_CPU_MASK_SIMPLE(xx)
 >> is used for gic-v3, maybe we should remove it, thanks.
@@ -83,7 +83,7 @@ Ding
 >>>>> +	model = "Hisilicon Hip05 D02 Development Board";
 >>>>> +	compatible = "hisilicon,hip05-d02";
 >>>>> +
->>>>> +	memory at 00000000 {
+>>>>> +	memory@00000000 {
 >>>>> +		device_type = "memory";
 >>>>> +		reg = <0x0 0x00000000 0x0 0x80000000>;
 >>>>> +	};
@@ -193,118 +193,118 @@ Ding
 >>>>> +			};
 >>>>> +		};
 >>>>> +
->>>>> +		cpu0: cpu at 20000 {
+>>>>> +		cpu0: cpu@20000 {
 >>>>> +			device_type = "cpu";
 >>>>> +			compatible = "arm,armv8";
 >>>>
 >>>> Change to "arm,cortex-a57","arm,armv8"?
 >>>>
 >>>
->>> Ok?but I think should be "hisilicon,hip05","arm,armv8".
+>>> Ok,but I think should be "hisilicon,hip05","arm,armv8".
 >>>
 >>>>> +			reg = <0x20000>;
 >>>>> +			enable-method = "psci";
 >>>>> +		};
 >>>>> +
->>>>> +		cpu1: cpu at 20001 {
+>>>>> +		cpu1: cpu@20001 {
 >>>>> +			device_type = "cpu";
 >>>>> +			compatible = "arm,armv8";
 >>>>> +			reg = <0x20001>;
 >>>>> +			enable-method = "psci";
 >>>>> +		};
 >>>>> +
->>>>> +		cpu2: cpu at 20002 {
+>>>>> +		cpu2: cpu@20002 {
 >>>>> +			device_type = "cpu";
 >>>>> +			compatible = "arm,armv8";
 >>>>> +			reg = <0x20002>;
 >>>>> +			enable-method = "psci";
 >>>>> +		};
 >>>>> +
->>>>> +		cpu3: cpu at 20003 {
+>>>>> +		cpu3: cpu@20003 {
 >>>>> +			device_type = "cpu";
 >>>>> +			compatible = "arm,armv8";
 >>>>> +			reg = <0x20003>;
 >>>>> +			enable-method = "psci";
 >>>>> +		};
 >>>>> +
->>>>> +		cpu4: cpu at 20100 {
+>>>>> +		cpu4: cpu@20100 {
 >>>>> +			device_type = "cpu";
 >>>>> +			compatible = "arm,armv8";
 >>>>> +			reg = <0x20100>;
 >>>>> +			enable-method = "psci";
 >>>>> +		};
 >>>>> +
->>>>> +		cpu5: cpu at 20101 {
+>>>>> +		cpu5: cpu@20101 {
 >>>>> +			device_type = "cpu";
 >>>>> +			compatible = "arm,armv8";
 >>>>> +			reg = <0x20101>;
 >>>>> +			enable-method = "psci";
 >>>>> +		};
 >>>>> +
->>>>> +		cpu6: cpu at 20102 {
+>>>>> +		cpu6: cpu@20102 {
 >>>>> +			device_type = "cpu";
 >>>>> +			compatible = "arm,armv8";
 >>>>> +			reg = <0x20102>;
 >>>>> +			enable-method = "psci";
 >>>>> +		};
 >>>>> +
->>>>> +		cpu7: cpu at 20103 {
+>>>>> +		cpu7: cpu@20103 {
 >>>>> +			device_type = "cpu";
 >>>>> +			compatible = "arm,armv8";
 >>>>> +			reg = <0x20103>;
 >>>>> +			enable-method = "psci";
 >>>>> +		};
 >>>>> +
->>>>> +		cpu8: cpu at 20200 {
+>>>>> +		cpu8: cpu@20200 {
 >>>>> +			device_type = "cpu";
 >>>>> +			compatible = "arm,armv8";
 >>>>> +			reg = <0x20200>;
 >>>>> +			enable-method = "psci";
 >>>>> +		};
 >>>>> +
->>>>> +		cpu9: cpu at 20201 {
+>>>>> +		cpu9: cpu@20201 {
 >>>>> +			device_type = "cpu";
 >>>>> +			compatible = "arm,armv8";
 >>>>> +			reg = <0x20201>;
 >>>>> +			enable-method = "psci";
 >>>>> +		};
 >>>>> +
->>>>> +		cpu10: cpu at 20202 {
+>>>>> +		cpu10: cpu@20202 {
 >>>>> +			device_type = "cpu";
 >>>>> +			compatible = "arm,armv8";
 >>>>> +			reg = <0x20202>;
 >>>>> +			enable-method = "psci";
 >>>>> +		};
 >>>>> +
->>>>> +		cpu11: cpu at 20203 {
+>>>>> +		cpu11: cpu@20203 {
 >>>>> +			device_type = "cpu";
 >>>>> +			compatible = "arm,armv8";
 >>>>> +			reg = <0x20203>;
 >>>>> +			enable-method = "psci";
 >>>>> +		};
 >>>>> +
->>>>> +		cpu12: cpu at 20300 {
+>>>>> +		cpu12: cpu@20300 {
 >>>>> +			device_type = "cpu";
 >>>>> +			compatible = "arm,armv8";
 >>>>> +			reg = <0x20300>;
 >>>>> +			enable-method = "psci";
 >>>>> +		};
 >>>>> +
->>>>> +		cpu13: cpu at 20301 {
+>>>>> +		cpu13: cpu@20301 {
 >>>>> +			device_type = "cpu";
 >>>>> +			compatible = "arm,armv8";
 >>>>> +			reg = <0x20301>;
 >>>>> +			enable-method = "psci";
 >>>>> +		};
 >>>>> +
->>>>> +		cpu14: cpu at 20302 {
+>>>>> +		cpu14: cpu@20302 {
 >>>>> +			device_type = "cpu";
 >>>>> +			compatible = "arm,armv8";
 >>>>> +			reg = <0x20302>;
 >>>>> +			enable-method = "psci";
 >>>>> +		};
 >>>>> +
->>>>> +		cpu15: cpu at 20303 {
+>>>>> +		cpu15: cpu@20303 {
 >>>>> +			device_type = "cpu";
 >>>>> +			compatible = "arm,armv8";
 >>>>> +			reg = <0x20303>;
@@ -312,7 +312,7 @@ Ding
 >>>>> +		};
 >>>>> +	};
 >>>>> +
->>>>> +	gic: interrupt-controller at 8d000000 {
+>>>>> +	gic: interrupt-controller@8d000000 {
 >>>>> +		compatible = "arm,gic-v3";
 >>>>> +                #interrupt-cells = <3>;
 >>>>> +                #address-cells = <2>;
@@ -328,7 +328,7 @@ Ding
 >>>>> +		      <0x0 0xfe020000 0 0x10000>;       /* GICV */
 >>>>> +		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
 >>>>> +
->>>>> +		its_totems: interrupt-controller at 8c000000 {
+>>>>> +		its_totems: interrupt-controller@8c000000 {
 >>>>> +			compatible = "arm,gic-v3-its";
 >>>>> +			msi-controller;
 >>>>> +			reg = <0x0 0x8c000000 0x0 0x1000000>;
@@ -371,7 +371,7 @@ Ding
 >>>>> +			clock-frequency = <200000000>;
 >>>>> +		};
 >>>>> +
->>>>> +		uart0: uart at 80300000 {
+>>>>> +		uart0: uart@80300000 {
 >>>>> +			compatible = "snps,dw-apb-uart";
 >>>>> +			reg = <0x0 0x80300000 0x0 0x10000>;
 >>>>> +			interrupts = <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>;
@@ -382,7 +382,7 @@ Ding
 >>>>> +			status = "disabled";
 >>>>> +		};
 >>>>> +
->>>>> +		uart1: uart at 80310000 {
+>>>>> +		uart1: uart@80310000 {
 >>>>> +			compatible = "snps,dw-apb-uart";
 >>>>> +			reg = <0x0 0x80310000 0x0 0x10000>;
 >>>>> +			interrupts = <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
@@ -401,7 +401,7 @@ Ding
 >>>>>
 >>>>> _______________________________________________
 >>>>> linux-arm-kernel mailing list
->>>>> linux-arm-kernel at lists.infradead.org
+>>>>> linux-arm-kernel@lists.infradead.org
 >>>>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
 >>>>
 >>>> .
@@ -410,7 +410,7 @@ Ding
 >>>
 >>> _______________________________________________
 >>> linuxarm mailing list
->>> linuxarm at huawei.com
+>>> linuxarm@huawei.com
 >>> http://rnd-openeuler.huawei.com/mailman/listinfo/linuxarm
 >>>
 >>
diff --git a/a/content_digest b/N2/content_digest
index 320de47..f4d3b0d 100644
--- a/a/content_digest
+++ b/N2/content_digest
@@ -4,17 +4,32 @@
  "ref\055E45A46.7040805@huawei.com\0"
  "ref\055E67AD1.2010405@huawei.com\0"
  "ref\055E6AC08.4000302@arm.com\0"
- "From\0dingtianhong@huawei.com (Ding Tianhong)\0"
- "Subject\0[PATCH 2/2] arm64: dts: add dts files for Hisilicon Hip05-D02 Development Board\0"
+ "From\0Ding Tianhong <dingtianhong@huawei.com>\0"
+ "Subject\0Re: [PATCH 2/2] arm64: dts: add dts files for Hisilicon Hip05-D02 Development Board\0"
  "Date\0Wed, 2 Sep 2015 16:20:36 +0800\0"
- "To\0linux-arm-kernel@lists.infradead.org\0"
+ "To\0Marc Zyngier <marc.zyngier@arm.com>"
+ " Leo Yan <leo.yan@linaro.org>\0"
+ "Cc\0<mark.rutland@arm.com>"
+  <devicetree@vger.kernel.org>
+  <pawel.moll@arm.com>
+  <ijc+devicetree@hellion.org.uk>
+  <catalin.marinas@arm.com>
+  <will.deacon@arm.com>
+  <linux-kernel@vger.kernel.org>
+  <linuxarm@huawei.com>
+  <robh+dt@kernel.org>
+  <haojian.zhuang@linaro.org>
+  <galak@codeaurora.org>
+  <zhangfei.gao@linaro.org>
+  <rob.herring@linaro.org>
+ " <linux-arm-kernel@lists.infradead.org>\0"
  "\00:1\0"
  "b\0"
  "On 2015/9/2 15:58, Marc Zyngier wrote:\n"
  "> [Don't top-post, this is very annoying]\n"
  "> \n"
  "> On 02/09/15 05:28, Ding Tianhong wrote:\n"
- ">> Hi?Marc?\n"
+ ">> Hi\357\274\214Marc\357\274\232\n"
  ">>\n"
  ">> Can you check this, I am not sure whether the GIC_CPU_MASK_SIMPLE(xx)\n"
  ">> is used for gic-v3, maybe we should remove it, thanks.\n"
@@ -95,7 +110,7 @@
  ">>>>> +\tmodel = \"Hisilicon Hip05 D02 Development Board\";\n"
  ">>>>> +\tcompatible = \"hisilicon,hip05-d02\";\n"
  ">>>>> +\n"
- ">>>>> +\tmemory at 00000000 {\n"
+ ">>>>> +\tmemory@00000000 {\n"
  ">>>>> +\t\tdevice_type = \"memory\";\n"
  ">>>>> +\t\treg = <0x0 0x00000000 0x0 0x80000000>;\n"
  ">>>>> +\t};\n"
@@ -205,118 +220,118 @@
  ">>>>> +\t\t\t};\n"
  ">>>>> +\t\t};\n"
  ">>>>> +\n"
- ">>>>> +\t\tcpu0: cpu at 20000 {\n"
+ ">>>>> +\t\tcpu0: cpu@20000 {\n"
  ">>>>> +\t\t\tdevice_type = \"cpu\";\n"
  ">>>>> +\t\t\tcompatible = \"arm,armv8\";\n"
  ">>>>\n"
  ">>>> Change to \"arm,cortex-a57\",\"arm,armv8\"?\n"
  ">>>>\n"
  ">>>\n"
- ">>> Ok?but I think should be \"hisilicon,hip05\",\"arm,armv8\".\n"
+ ">>> Ok\357\274\214but I think should be \"hisilicon,hip05\",\"arm,armv8\".\n"
  ">>>\n"
  ">>>>> +\t\t\treg = <0x20000>;\n"
  ">>>>> +\t\t\tenable-method = \"psci\";\n"
  ">>>>> +\t\t};\n"
  ">>>>> +\n"
- ">>>>> +\t\tcpu1: cpu at 20001 {\n"
+ ">>>>> +\t\tcpu1: cpu@20001 {\n"
  ">>>>> +\t\t\tdevice_type = \"cpu\";\n"
  ">>>>> +\t\t\tcompatible = \"arm,armv8\";\n"
  ">>>>> +\t\t\treg = <0x20001>;\n"
  ">>>>> +\t\t\tenable-method = \"psci\";\n"
  ">>>>> +\t\t};\n"
  ">>>>> +\n"
- ">>>>> +\t\tcpu2: cpu at 20002 {\n"
+ ">>>>> +\t\tcpu2: cpu@20002 {\n"
  ">>>>> +\t\t\tdevice_type = \"cpu\";\n"
  ">>>>> +\t\t\tcompatible = \"arm,armv8\";\n"
  ">>>>> +\t\t\treg = <0x20002>;\n"
  ">>>>> +\t\t\tenable-method = \"psci\";\n"
  ">>>>> +\t\t};\n"
  ">>>>> +\n"
- ">>>>> +\t\tcpu3: cpu at 20003 {\n"
+ ">>>>> +\t\tcpu3: cpu@20003 {\n"
  ">>>>> +\t\t\tdevice_type = \"cpu\";\n"
  ">>>>> +\t\t\tcompatible = \"arm,armv8\";\n"
  ">>>>> +\t\t\treg = <0x20003>;\n"
  ">>>>> +\t\t\tenable-method = \"psci\";\n"
  ">>>>> +\t\t};\n"
  ">>>>> +\n"
- ">>>>> +\t\tcpu4: cpu at 20100 {\n"
+ ">>>>> +\t\tcpu4: cpu@20100 {\n"
  ">>>>> +\t\t\tdevice_type = \"cpu\";\n"
  ">>>>> +\t\t\tcompatible = \"arm,armv8\";\n"
  ">>>>> +\t\t\treg = <0x20100>;\n"
  ">>>>> +\t\t\tenable-method = \"psci\";\n"
  ">>>>> +\t\t};\n"
  ">>>>> +\n"
- ">>>>> +\t\tcpu5: cpu at 20101 {\n"
+ ">>>>> +\t\tcpu5: cpu@20101 {\n"
  ">>>>> +\t\t\tdevice_type = \"cpu\";\n"
  ">>>>> +\t\t\tcompatible = \"arm,armv8\";\n"
  ">>>>> +\t\t\treg = <0x20101>;\n"
  ">>>>> +\t\t\tenable-method = \"psci\";\n"
  ">>>>> +\t\t};\n"
  ">>>>> +\n"
- ">>>>> +\t\tcpu6: cpu at 20102 {\n"
+ ">>>>> +\t\tcpu6: cpu@20102 {\n"
  ">>>>> +\t\t\tdevice_type = \"cpu\";\n"
  ">>>>> +\t\t\tcompatible = \"arm,armv8\";\n"
  ">>>>> +\t\t\treg = <0x20102>;\n"
  ">>>>> +\t\t\tenable-method = \"psci\";\n"
  ">>>>> +\t\t};\n"
  ">>>>> +\n"
- ">>>>> +\t\tcpu7: cpu at 20103 {\n"
+ ">>>>> +\t\tcpu7: cpu@20103 {\n"
  ">>>>> +\t\t\tdevice_type = \"cpu\";\n"
  ">>>>> +\t\t\tcompatible = \"arm,armv8\";\n"
  ">>>>> +\t\t\treg = <0x20103>;\n"
  ">>>>> +\t\t\tenable-method = \"psci\";\n"
  ">>>>> +\t\t};\n"
  ">>>>> +\n"
- ">>>>> +\t\tcpu8: cpu at 20200 {\n"
+ ">>>>> +\t\tcpu8: cpu@20200 {\n"
  ">>>>> +\t\t\tdevice_type = \"cpu\";\n"
  ">>>>> +\t\t\tcompatible = \"arm,armv8\";\n"
  ">>>>> +\t\t\treg = <0x20200>;\n"
  ">>>>> +\t\t\tenable-method = \"psci\";\n"
  ">>>>> +\t\t};\n"
  ">>>>> +\n"
- ">>>>> +\t\tcpu9: cpu at 20201 {\n"
+ ">>>>> +\t\tcpu9: cpu@20201 {\n"
  ">>>>> +\t\t\tdevice_type = \"cpu\";\n"
  ">>>>> +\t\t\tcompatible = \"arm,armv8\";\n"
  ">>>>> +\t\t\treg = <0x20201>;\n"
  ">>>>> +\t\t\tenable-method = \"psci\";\n"
  ">>>>> +\t\t};\n"
  ">>>>> +\n"
- ">>>>> +\t\tcpu10: cpu at 20202 {\n"
+ ">>>>> +\t\tcpu10: cpu@20202 {\n"
  ">>>>> +\t\t\tdevice_type = \"cpu\";\n"
  ">>>>> +\t\t\tcompatible = \"arm,armv8\";\n"
  ">>>>> +\t\t\treg = <0x20202>;\n"
  ">>>>> +\t\t\tenable-method = \"psci\";\n"
  ">>>>> +\t\t};\n"
  ">>>>> +\n"
- ">>>>> +\t\tcpu11: cpu at 20203 {\n"
+ ">>>>> +\t\tcpu11: cpu@20203 {\n"
  ">>>>> +\t\t\tdevice_type = \"cpu\";\n"
  ">>>>> +\t\t\tcompatible = \"arm,armv8\";\n"
  ">>>>> +\t\t\treg = <0x20203>;\n"
  ">>>>> +\t\t\tenable-method = \"psci\";\n"
  ">>>>> +\t\t};\n"
  ">>>>> +\n"
- ">>>>> +\t\tcpu12: cpu at 20300 {\n"
+ ">>>>> +\t\tcpu12: cpu@20300 {\n"
  ">>>>> +\t\t\tdevice_type = \"cpu\";\n"
  ">>>>> +\t\t\tcompatible = \"arm,armv8\";\n"
  ">>>>> +\t\t\treg = <0x20300>;\n"
  ">>>>> +\t\t\tenable-method = \"psci\";\n"
  ">>>>> +\t\t};\n"
  ">>>>> +\n"
- ">>>>> +\t\tcpu13: cpu at 20301 {\n"
+ ">>>>> +\t\tcpu13: cpu@20301 {\n"
  ">>>>> +\t\t\tdevice_type = \"cpu\";\n"
  ">>>>> +\t\t\tcompatible = \"arm,armv8\";\n"
  ">>>>> +\t\t\treg = <0x20301>;\n"
  ">>>>> +\t\t\tenable-method = \"psci\";\n"
  ">>>>> +\t\t};\n"
  ">>>>> +\n"
- ">>>>> +\t\tcpu14: cpu at 20302 {\n"
+ ">>>>> +\t\tcpu14: cpu@20302 {\n"
  ">>>>> +\t\t\tdevice_type = \"cpu\";\n"
  ">>>>> +\t\t\tcompatible = \"arm,armv8\";\n"
  ">>>>> +\t\t\treg = <0x20302>;\n"
  ">>>>> +\t\t\tenable-method = \"psci\";\n"
  ">>>>> +\t\t};\n"
  ">>>>> +\n"
- ">>>>> +\t\tcpu15: cpu at 20303 {\n"
+ ">>>>> +\t\tcpu15: cpu@20303 {\n"
  ">>>>> +\t\t\tdevice_type = \"cpu\";\n"
  ">>>>> +\t\t\tcompatible = \"arm,armv8\";\n"
  ">>>>> +\t\t\treg = <0x20303>;\n"
@@ -324,7 +339,7 @@
  ">>>>> +\t\t};\n"
  ">>>>> +\t};\n"
  ">>>>> +\n"
- ">>>>> +\tgic: interrupt-controller at 8d000000 {\n"
+ ">>>>> +\tgic: interrupt-controller@8d000000 {\n"
  ">>>>> +\t\tcompatible = \"arm,gic-v3\";\n"
  ">>>>> +                #interrupt-cells = <3>;\n"
  ">>>>> +                #address-cells = <2>;\n"
@@ -340,7 +355,7 @@
  ">>>>> +\t\t      <0x0 0xfe020000 0 0x10000>;       /* GICV */\n"
  ">>>>> +\t\tinterrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;\n"
  ">>>>> +\n"
- ">>>>> +\t\tits_totems: interrupt-controller at 8c000000 {\n"
+ ">>>>> +\t\tits_totems: interrupt-controller@8c000000 {\n"
  ">>>>> +\t\t\tcompatible = \"arm,gic-v3-its\";\n"
  ">>>>> +\t\t\tmsi-controller;\n"
  ">>>>> +\t\t\treg = <0x0 0x8c000000 0x0 0x1000000>;\n"
@@ -383,7 +398,7 @@
  ">>>>> +\t\t\tclock-frequency = <200000000>;\n"
  ">>>>> +\t\t};\n"
  ">>>>> +\n"
- ">>>>> +\t\tuart0: uart at 80300000 {\n"
+ ">>>>> +\t\tuart0: uart@80300000 {\n"
  ">>>>> +\t\t\tcompatible = \"snps,dw-apb-uart\";\n"
  ">>>>> +\t\t\treg = <0x0 0x80300000 0x0 0x10000>;\n"
  ">>>>> +\t\t\tinterrupts = <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>;\n"
@@ -394,7 +409,7 @@
  ">>>>> +\t\t\tstatus = \"disabled\";\n"
  ">>>>> +\t\t};\n"
  ">>>>> +\n"
- ">>>>> +\t\tuart1: uart at 80310000 {\n"
+ ">>>>> +\t\tuart1: uart@80310000 {\n"
  ">>>>> +\t\t\tcompatible = \"snps,dw-apb-uart\";\n"
  ">>>>> +\t\t\treg = <0x0 0x80310000 0x0 0x10000>;\n"
  ">>>>> +\t\t\tinterrupts = <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;\n"
@@ -413,7 +428,7 @@
  ">>>>>\n"
  ">>>>> _______________________________________________\n"
  ">>>>> linux-arm-kernel mailing list\n"
- ">>>>> linux-arm-kernel at lists.infradead.org\n"
+ ">>>>> linux-arm-kernel@lists.infradead.org\n"
  ">>>>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel\n"
  ">>>>\n"
  ">>>> .\n"
@@ -422,7 +437,7 @@
  ">>>\n"
  ">>> _______________________________________________\n"
  ">>> linuxarm mailing list\n"
- ">>> linuxarm at huawei.com\n"
+ ">>> linuxarm@huawei.com\n"
  ">>> http://rnd-openeuler.huawei.com/mailman/listinfo/linuxarm\n"
  ">>>\n"
  ">>\n"
@@ -430,4 +445,4 @@
  "> \n"
  >
 
-5dcc86027e0db6fa7e83fd109c0a2bda6eaf0d7d4fe3498c3bb20fadb1f05c86
+6d4abb9f19590976489f7bb1c4d02058ffe6908ec746ad1b314b051f9f566ff0

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