From: Marc Zyngier <marc.zyngier@arm.com>
To: Christoffer Dall <christoffer.dall@linaro.org>,
kvmarm@lists.cs.columbia.edu,
linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org
Subject: Re: [PATCH 4/9] arm/arm64: Implement GICD_ICFGR as RO for PPIs
Date: Thu, 03 Sep 2015 16:03:58 +0100 [thread overview]
Message-ID: <55E8615E.30300@arm.com> (raw)
In-Reply-To: <1440942866-23802-5-git-send-email-christoffer.dall@linaro.org>
On 30/08/15 14:54, Christoffer Dall wrote:
> The GICD_ICFGR allows the bits for the SGIs and PPIs to be read only.
> We currently simulate this behavior by writing a hardcoded value to the
> register for the SGIs and PPIs on every write of these bits to the
> register (ignoring what the guest actually wrote), and by writing the
> same value as the reset value to the register.
>
> This is a bit counter-intuitive, as the register is RO for these bits,
> and we can just implement it that way, allowing us to control the value
> of the bits purely in the reset code.
>
> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
M.
--
Jazz is not dead. It just smells funny...
WARNING: multiple messages have this Message-ID (diff)
From: marc.zyngier@arm.com (Marc Zyngier)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 4/9] arm/arm64: Implement GICD_ICFGR as RO for PPIs
Date: Thu, 03 Sep 2015 16:03:58 +0100 [thread overview]
Message-ID: <55E8615E.30300@arm.com> (raw)
In-Reply-To: <1440942866-23802-5-git-send-email-christoffer.dall@linaro.org>
On 30/08/15 14:54, Christoffer Dall wrote:
> The GICD_ICFGR allows the bits for the SGIs and PPIs to be read only.
> We currently simulate this behavior by writing a hardcoded value to the
> register for the SGIs and PPIs on every write of these bits to the
> register (ignoring what the guest actually wrote), and by writing the
> same value as the reset value to the register.
>
> This is a bit counter-intuitive, as the register is RO for these bits,
> and we can just implement it that way, allowing us to control the value
> of the bits purely in the reset code.
>
> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
M.
--
Jazz is not dead. It just smells funny...
next prev parent reply other threads:[~2015-09-03 15:03 UTC|newest]
Thread overview: 74+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-08-30 13:54 [PATCH 0/9] Rework architected timer and fix UEFI reset Christoffer Dall
2015-08-30 13:54 ` Christoffer Dall
2015-08-30 13:54 ` [PATCH 1/9] KVM: Add kvm_arch_vcpu_{un}blocking callbacks Christoffer Dall
2015-08-30 13:54 ` Christoffer Dall
2015-09-03 14:21 ` Marc Zyngier
2015-09-03 14:21 ` Marc Zyngier
2015-09-04 13:50 ` Eric Auger
2015-09-04 13:50 ` Eric Auger
2015-09-04 14:50 ` Christoffer Dall
2015-09-04 14:50 ` Christoffer Dall
2015-08-30 13:54 ` [PATCH 2/9] arm/arm64: KVM: arch_timer: Only schedule soft timer on vcpu_block Christoffer Dall
2015-08-30 13:54 ` Christoffer Dall
2015-09-03 14:43 ` Marc Zyngier
2015-09-03 14:43 ` Marc Zyngier
2015-09-03 14:58 ` Christoffer Dall
2015-09-03 14:58 ` Christoffer Dall
2015-09-03 15:53 ` Marc Zyngier
2015-09-03 15:53 ` Marc Zyngier
2015-09-03 16:09 ` Christoffer Dall
2015-09-03 16:09 ` Christoffer Dall
2015-08-30 13:54 ` [PATCH 3/9] arm/arm64: KVM: vgic: Factor out level irq processing on guest exit Christoffer Dall
2015-08-30 13:54 ` Christoffer Dall
2015-09-03 15:01 ` Marc Zyngier
2015-09-03 15:01 ` Marc Zyngier
2015-08-30 13:54 ` [PATCH 4/9] arm/arm64: Implement GICD_ICFGR as RO for PPIs Christoffer Dall
2015-08-30 13:54 ` Christoffer Dall
2015-09-03 15:03 ` Marc Zyngier [this message]
2015-09-03 15:03 ` Marc Zyngier
2015-08-30 13:54 ` [PATCH 5/9] arm/arm64: KVM: Use appropriate define in VGIC reset code Christoffer Dall
2015-08-30 13:54 ` Christoffer Dall
2015-09-03 15:04 ` Marc Zyngier
2015-09-03 15:04 ` Marc Zyngier
2015-09-04 16:08 ` Eric Auger
2015-09-04 16:08 ` Eric Auger
2015-08-30 13:54 ` [PATCH 6/9] arm/arm64: KVM: Add mapped interrupts documentation Christoffer Dall
2015-08-30 13:54 ` Christoffer Dall
2015-09-03 15:23 ` Marc Zyngier
2015-09-03 15:23 ` Marc Zyngier
2015-09-03 15:56 ` Eric Auger
2015-09-03 15:56 ` Eric Auger
2015-09-04 15:54 ` Christoffer Dall
2015-09-04 15:54 ` Christoffer Dall
2015-09-04 15:55 ` Christoffer Dall
2015-09-04 15:55 ` Christoffer Dall
2015-09-04 15:57 ` Christoffer Dall
2015-09-04 15:57 ` Christoffer Dall
2015-09-04 15:59 ` Marc Zyngier
2015-09-04 15:59 ` Marc Zyngier
2015-08-30 13:54 ` [PATCH 7/9] arm/arm64: KVM: vgic: Move active state handling to flush_hwstate Christoffer Dall
2015-08-30 13:54 ` Christoffer Dall
2015-09-03 15:33 ` Marc Zyngier
2015-09-03 15:33 ` Marc Zyngier
2015-08-30 13:54 ` [PATCH 8/9] arm/arm64: KVM: Rework the arch timer to use level-triggered semantics Christoffer Dall
2015-08-30 13:54 ` Christoffer Dall
2015-09-03 17:06 ` Marc Zyngier
2015-09-03 17:06 ` Marc Zyngier
2015-09-03 17:23 ` Christoffer Dall
2015-09-03 17:23 ` Christoffer Dall
2015-09-03 17:29 ` Marc Zyngier
2015-09-03 17:29 ` Marc Zyngier
2015-09-03 22:00 ` Christoffer Dall
2015-09-03 22:00 ` Christoffer Dall
2015-08-30 13:54 ` [PATCH 9/9] arm/arm64: KVM: arch timer: Reset CNTV_CTL to 0 Christoffer Dall
2015-08-30 13:54 ` Christoffer Dall
2015-08-31 8:46 ` Ard Biesheuvel
2015-08-31 8:46 ` Ard Biesheuvel
2015-08-31 8:57 ` Christoffer Dall
2015-08-31 8:57 ` Christoffer Dall
2015-08-31 9:02 ` Ard Biesheuvel
2015-08-31 9:02 ` Ard Biesheuvel
2015-09-03 17:07 ` Marc Zyngier
2015-09-03 17:07 ` Marc Zyngier
2015-09-03 17:10 ` [PATCH 0/9] Rework architected timer and fix UEFI reset Marc Zyngier
2015-09-03 17:10 ` Marc Zyngier
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