Re: [PATCH 1/4] x86/mce: Fix code style

["Egger, Christoph" <chegger@amazon.de>]

On 2015/09/15 10:29, Haozhong Zhang wrote:
> Remove trailing spaces and fix indentations in mce.c and xen-mca.h.
> 
> Signed-off-by: Haozhong Zhang <haozhong.zhang@intel.com>

Acked-by: Christoph Egger <chegger@amazon.de>

> ---
>  xen/arch/x86/cpu/mcheck/mce.c         | 10 +++++-----
>  xen/include/public/arch-x86/xen-mca.h | 28 ++++++++++++++--------------
>  2 files changed, 19 insertions(+), 19 deletions(-)
> 
> diff --git a/xen/arch/x86/cpu/mcheck/mce.c b/xen/arch/x86/cpu/mcheck/mce.c
> index 7c2cacc..561257d 100644
> --- a/xen/arch/x86/cpu/mcheck/mce.c
> +++ b/xen/arch/x86/cpu/mcheck/mce.c
> @@ -105,7 +105,7 @@ void x86_mce_callback_register(x86_mce_callback_t cbfunc)
>      mc_callback_bank_extended = cbfunc;
>  }
>  
> -/* Machine check recoverable judgement callback handler
> +/* Machine check recoverable judgement callback handler
>   * It is used to judge whether an UC error is recoverable by software
>   */
>  static mce_recoverable_t mc_recoverable_scan = NULL;
> @@ -160,9 +160,9 @@ static void mcabank_clear(int banknum)
>  }
>  
>  /* Judging whether to Clear Machine Check error bank callback handler
> - * According to Intel latest MCA OS Recovery Writer's Guide,
> + * According to Intel latest MCA OS Recovery Writer's Guide,
>   * whether the error MCA bank needs to be cleared is decided by the mca_source
> - * and MCi_status bit value.
> + * and MCi_status bit value.
>   */
>  static mce_need_clearbank_t mc_need_clearbank_scan = NULL;
>  
> @@ -535,7 +535,7 @@ void mcheck_cmn_handler(const struct cpu_user_regs *regs)
>          }
>          atomic_set(&found_error, 0);
>      }
> -    mce_barrier_exit(&mce_trap_bar);
> +    mce_barrier_exit(&mce_trap_bar);
>  
>      /* Clear flags after above fatal check */
>      mce_barrier_enter(&mce_trap_bar);
> @@ -891,7 +891,7 @@ void x86_mcinfo_dump(struct mc_info *mi)
>                 "CPU%d: Machine Check Exception: %16"PRIx64"\n",
>                 mc_global->mc_coreid, mc_global->mc_gstatus);
>      } else if (mc_global->mc_flags & MC_FLAG_CMCI) {
> -        printk(XENLOG_WARNING "CMCI occurred on CPU %d.\n",
> +        printk(XENLOG_WARNING "CMCI occurred on CPU %d.\n",
>                 mc_global->mc_coreid);
>      } else if (mc_global->mc_flags & MC_FLAG_POLLED) {
>          printk(XENLOG_WARNING "POLLED occurred on CPU %d.\n",
> diff --git a/xen/include/public/arch-x86/xen-mca.h b/xen/include/public/arch-x86/xen-mca.h
> index 04382ed..2422b76 100644
> --- a/xen/include/public/arch-x86/xen-mca.h
> +++ b/xen/include/public/arch-x86/xen-mca.h
> @@ -1,11 +1,11 @@
>  /******************************************************************************
>   * arch-x86/mca.h
> - *
> + *
>   * Contributed by Advanced Micro Devices, Inc.
>   * Author: Christoph Egger <Christoph.Egger@amd.com>
>   *
>   * Guest OS machine check interface to x86 Xen.
> - *
> + *
>   * Permission is hereby granted, free of charge, to any person obtaining a copy
>   * of this software and associated documentation files (the "Software"), to
>   * deal in the Software without restriction, including without limitation the
> @@ -156,7 +156,7 @@ struct mcinfo_msr {
>  };
>  
>  /* contains mc information from other
> - * or additional mc MSRs */
> + * or additional mc MSRs */
>  struct mcinfo_extended {
>      struct mcinfo_common common;
>  
> @@ -193,10 +193,10 @@ struct mcinfo_extended {
>  /* L3 cache disable Action */
>  #define MC_ACTION_CACHE_SHRINK (0x1 << 2)
>  
> -/* Below interface used between XEN/DOM0 for passing XEN's recovery action
> - * information to DOM0.
> +/* Below interface used between XEN/DOM0 for passing XEN's recovery action
> + * information to DOM0.
>   * usage Senario: After offlining broken page, XEN might pass its page offline
> - * recovery action result to DOM0. DOM0 will save the information in
> + * recovery action result to DOM0. DOM0 will save the information in
>   * non-volatile memory for further proactive actions, such as offlining the
>   * easy broken page earlier when doing next reboot.
>  */
> @@ -255,8 +255,8 @@ DEFINE_XEN_GUEST_HANDLE(mc_info_t);
>  #define MC_CAPS_AMD_ECX	6	/* cpuid level 0x80000001 (%ecx) */
>  
>  struct mcinfo_logical_cpu {
> -    uint32_t mc_cpunr;
> -    uint32_t mc_chipid;
> +    uint32_t mc_cpunr;
> +    uint32_t mc_chipid;
>      uint16_t mc_coreid;
>      uint16_t mc_threadid;
>      uint32_t mc_apicid;
> @@ -281,7 +281,7 @@ typedef struct mcinfo_logical_cpu xen_mc_logical_cpu_t;
>  DEFINE_XEN_GUEST_HANDLE(xen_mc_logical_cpu_t);
>  
>  
> -/*
> +/*
>   * OS's should use these instead of writing their own lookup function
>   * each with its own bugs and drawbacks.
>   * We use macros instead of static inline functions to allow guests
> @@ -389,11 +389,11 @@ struct xen_mc_physcpuinfo {
>  #define MC_MSRINJ_MAXMSRS       8
>  struct xen_mc_msrinject {
>         /* IN */
> -	uint32_t mcinj_cpunr;           /* target processor id */
> -	uint32_t mcinj_flags;           /* see MC_MSRINJ_F_* below */
> -	uint32_t mcinj_count;           /* 0 .. count-1 in array are valid */
> -	uint32_t _pad0;
> -	struct mcinfo_msr mcinj_msr[MC_MSRINJ_MAXMSRS];
> +    uint32_t mcinj_cpunr;           /* target processor id */
> +    uint32_t mcinj_flags;           /* see MC_MSRINJ_F_* below */
> +    uint32_t mcinj_count;           /* 0 .. count-1 in array are valid */
> +    uint32_t _pad0;
> +    struct mcinfo_msr mcinj_msr[MC_MSRINJ_MAXMSRS];
>  };
>  
>  /* Flags for mcinj_flags above; bits 16-31 are reserved */
> --
> 2.4.8
> 

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