From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52385) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZbmpI-0006mW-OZ for qemu-devel@nongnu.org; Tue, 15 Sep 2015 05:47:01 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZbmpE-0000RD-N5 for qemu-devel@nongnu.org; Tue, 15 Sep 2015 05:47:00 -0400 Received: from mailapp01.imgtec.com ([195.59.15.196]:8114) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZbmpE-0000R6-HV for qemu-devel@nongnu.org; Tue, 15 Sep 2015 05:46:56 -0400 References: <1436163304-6167-1-git-send-email-serge.vakulenko@gmail.com> <1436163304-6167-3-git-send-email-serge.vakulenko@gmail.com> From: Leon Alrae Message-ID: <55F7E90F.3020809@imgtec.com> Date: Tue, 15 Sep 2015 10:46:55 +0100 MIME-Version: 1.0 In-Reply-To: <1436163304-6167-3-git-send-email-serge.vakulenko@gmail.com> Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH pic32 v3 02/16] pic32: use LCG algorithm for generated random index of TLBWR instruction List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Serge Vakulenko , qemu-devel@nongnu.org Cc: Aurelien Jarno On 06/07/15 07:14, Serge Vakulenko wrote: > The LFSR algorithm, used for generating random TLB indexes for TLBWR instruction, > was inclined to produce a degenerate sequence in some cases. > For example, for 16-entry TLB size and Wired=1, it gives: 15, 6, 7, 2, > 7, 2, 7, 2, 7, 2, 7, 2, 7, 2, 7, 2, 7, 2, 7, 2, 7, 2, 7, 2, 7, 2, 7, 2... > When replaced with LCG algorithm from ISO/IEC 9899 standard, the sequence > looks much better, with about the same computational effort needed. > > Signed-off-by: Serge Vakulenko > --- > hw/mips/cputimer.c | 9 ++++++--- > 1 file changed, 6 insertions(+), 3 deletions(-) I cherry-picked this patch from the series and applied to mips-next queue, thanks. Leon