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From: Ben Greear <greearb@candelatech.com>
To: ath10k <ath10k@lists.infradead.org>
Subject: Bug in CCK hw_rate definitions?
Date: Tue, 15 Sep 2015 14:35:04 -0700	[thread overview]
Message-ID: <55F88F08.1000703@candelatech.com> (raw)

ath10k hw.h has this:

enum ath10k_hw_rate_cck {
	ATH10K_HW_RATE_CCK_LP_11M = 0,
	ATH10K_HW_RATE_CCK_LP_5_5M,
	ATH10K_HW_RATE_CCK_LP_2M,
	ATH10K_HW_RATE_CCK_LP_1M,

But, at least in 10.1 firmware, it appears that CCK hw_rates are 0x40, 0x41, etc
(For those of you with firmware, see ar600P_phy.c, 'RC' column of the rate table.)

Am I missing something or is the driver code just wrong?

Thanks,
Ben

-- 
Ben Greear <greearb@candelatech.com>
Candela Technologies Inc  http://www.candelatech.com


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             reply	other threads:[~2015-09-15 21:35 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-09-15 21:35 Ben Greear [this message]
2015-09-21  7:32 ` Bug in CCK hw_rate definitions? Michal Kazior
2015-09-29 20:42   ` Ben Greear

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