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From: Julien Grall <julien.grall@citrix.com>
To: Quan Xu <quan.xu@intel.com>,
	andrew.cooper3@citrix.com, eddie.dong@intel.com,
	ian.campbell@citrix.com, ian.jackson@eu.citrix.com,
	jbeulich@suse.com, jun.nakajima@intel.com, keir@xen.org,
	kevin.tian@intel.com, tim@xen.org, yang.z.zhang@intel.com,
	george.dunlap@eu.citrix.com
Cc: xen-devel@lists.xen.org
Subject: Re: [Patch RFC 03/13] vt-d: Track the Device-TLB invalidation status in an invalidation table.
Date: Wed, 16 Sep 2015 10:33:53 +0100	[thread overview]
Message-ID: <55F93781.7060405@citrix.com> (raw)
In-Reply-To: <1442409847-65383-4-git-send-email-quan.xu@intel.com>

Hi Quan,

The time of the mail is in a future. Can you configure your mail to 
report the correct time?

On 16/09/2015 14:23, Quan Xu wrote:
> diff --git a/xen/include/xen/hvm/iommu.h b/xen/include/xen/hvm/iommu.h
> index 106e08f..28e7fc3 100644
> --- a/xen/include/xen/hvm/iommu.h
> +++ b/xen/include/xen/hvm/iommu.h
> @@ -23,6 +23,21 @@
>   #include <xen/list.h>
>   #include <asm/hvm/iommu.h>
>
> +/*
> + * Status Address and Data: Status address and data is used by hardware to perform
> + * wait descriptor completion status write when the Status Write(SW) field is Set.
> + *
> + * Track the Device-TLB invalidation status in an invalidation table. Update
> + * invalidation table's count of in-flight Device-TLB invalidation request and
> + * assign the address of global polling parameter per domain in the Status Address
> + * of each invalidation wait descriptor, when submit Device-TLB invalidation
> + * requests.
> + */
> +struct qi_talbe {

Did you want to say table rather than talbe?

> +    u64 qi_table_poll_slot;
> +    u32 qi_table_status_data;
> +};
> +
>   struct hvm_iommu {
>       struct arch_hvm_iommu arch;
>
> @@ -34,6 +49,9 @@ struct hvm_iommu {
>       struct list_head dt_devices;
>   #endif
>
> +    /* IOMMU Queued Invalidation(QI) */
> +    struct qi_talbe talbe;
> +

This header is should contain any common code between ARM and x86. 
Although, this feature seems to be vtd only (i.e x86).

So this should be moved in arch_hvm_iommu defined in asm-x86/hvm/iommu.h.

You would then be able to access the data using 
domain_hvm_iommu(d)->arch.field


>       /* Features supported by the IOMMU */
>       DECLARE_BITMAP(features, IOMMU_FEAT_count);
>   };
> @@ -41,4 +59,9 @@ struct hvm_iommu {
>   #define iommu_set_feature(d, f)   set_bit((f), domain_hvm_iommu(d)->features)
>   #define iommu_clear_feature(d, f) clear_bit((f), domain_hvm_iommu(d)->features)
>
> +#define qi_table_data(d) \
> +    (d->arch.hvm_domain.hvm_iommu.talbe.qi_table_status_data)
> +#define qi_table_pollslot(d) \
> +    (d->arch.hvm_domain.hvm_iommu.talbe.qi_table_poll_slot)

The way to access the iommu data on ARM and x86 are different. Please 
use domain_hvm_iommu(d)->field if you keep these fields in common code.

> +
>   #endif /* __XEN_HVM_IOMMU_H__ */
>

Regards,

-- 
Julien Grall

  reply	other threads:[~2015-09-16  9:33 UTC|newest]

Thread overview: 84+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-09-16 13:23 [Patch RFC 00/13] VT-d Asynchronous Device-TLB Flush for ATS Device Quan Xu
2015-09-16 10:46 ` Ian Jackson
2015-09-16 11:22   ` Julien Grall
2015-09-16 13:47     ` Ian Jackson
2015-09-17  9:06       ` Julien Grall
2015-09-17 10:16         ` Ian Jackson
2015-09-16 13:33   ` Xu, Quan
2015-09-16 13:23 ` [Patch RFC 01/13] vt-d: Redefine iommu_set_interrupt() for registering MSI interrupt Quan Xu
2015-09-29  8:43   ` Jan Beulich
2015-09-16 13:23 ` [Patch RFC 02/13] vt-d: Register MSI for async invalidation completion interrupt Quan Xu
2015-09-29  8:57   ` Jan Beulich
2015-10-10  8:22     ` Xu, Quan
2015-10-12  7:11       ` Jan Beulich
2015-09-16 13:23 ` [Patch RFC 03/13] vt-d: Track the Device-TLB invalidation status in an invalidation table Quan Xu
2015-09-16  9:33   ` Julien Grall [this message]
2015-09-16 13:43     ` Xu, Quan
2015-09-29  9:24   ` Jan Beulich
2015-10-10 12:27     ` Xu, Quan
2015-10-12  7:15       ` Jan Beulich
2015-09-16 13:23 ` [Patch RFC 04/13] vt-d: Clear invalidation table in invaidation interrupt handler Quan Xu
2015-09-29  9:33   ` Jan Beulich
2015-09-16 13:23 ` [Patch RFC 05/13] vt-d: Clear the IWC field of Invalidation Event Control Register in Quan Xu
2015-09-29  9:44   ` Jan Beulich
2015-09-16 13:24 ` [Patch RFC 06/13] vt-d: Introduce a new per-domain flag - qi_flag Quan Xu
2015-09-16  9:34   ` Julien Grall
2015-09-16 13:24 ` [Patch RFC 07/13] vt-d: If the qi_flag is Set, the domain's vCPUs are not allowed to Quan Xu
2015-09-16  9:44   ` Julien Grall
2015-09-16 14:03     ` Xu, Quan
2015-09-16 13:24 ` [Patch RFC 08/13] vt-d: Held on the freed page until the Device-TLB flush is completed Quan Xu
2015-09-16  9:45   ` Julien Grall
2015-09-16 13:24 ` [Patch RFC 09/13] vt-d: Put the page in Queued Invalidation(QI) interrupt handler if Quan Xu
2015-09-16 13:24 ` [Patch RFC 10/13] vt-d: Held on the removed page until the Device-TLB flush is completed Quan Xu
2015-09-16  9:52   ` Julien Grall
2015-09-16 13:24 ` [Patch RFC 11/13] vt-d: If the Device-TLB flush is still not completed when Quan Xu
2015-09-16  9:56   ` Julien Grall
2015-09-23 17:38   ` Konrad Rzeszutek Wilk
2015-09-24  1:40     ` Xu, Quan
2015-09-16 13:24 ` [Patch RFC 12/13] vt-d: For gnttab_transfer, If the Device-TLB flush is still Quan Xu
2015-09-16 13:24 ` [Patch RFC 13/13] vt-d: Set the IF bit in Invalidation Wait Descriptor When submit Device-TLB Quan Xu
2015-09-29  9:46   ` Jan Beulich
2015-09-17  3:26 ` [Patch RFC 00/13] VT-d Asynchronous Device-TLB Flush for ATS Device Xu, Quan
2015-09-21  8:51   ` Jan Beulich
2015-09-21  9:46     ` Xu, Quan
2015-09-21 12:03       ` Jan Beulich
2015-09-21 14:03         ` Xu, Quan
2015-09-21 14:20           ` Jan Beulich
2015-09-21 14:09 ` Xu, Quan
2015-09-23 16:26   ` Tim Deegan
2015-09-28  3:08     ` Xu, Quan
2015-09-28  6:47       ` Jan Beulich
2015-09-29  2:53         ` Xu, Quan
2015-09-29  7:21           ` Jan Beulich
2015-09-30 13:55             ` Xu, Quan
2015-09-30 14:03               ` Jan Beulich
2015-10-13 14:29             ` Xu, Quan
2015-10-13 14:50               ` Jan Beulich
2015-10-14 14:54                 ` Xu, Quan
2015-09-29  9:11       ` Tim Deegan
2015-09-29  9:57         ` Jan Beulich
2015-09-30 15:05         ` Xu, Quan
2015-10-01  9:09           ` Tim Deegan
2015-10-07 17:02             ` Xu, Quan
2015-10-08  8:51               ` Jan Beulich
2015-10-09  7:06                 ` Xu, Quan
2015-10-09  7:18                   ` Jan Beulich
2015-10-09  7:51                     ` Xu, Quan
2015-10-10 18:24               ` Tim Deegan
2015-10-11 11:09                 ` Xu, Quan
2015-10-12 12:25                   ` Jan Beulich
2015-10-13  9:34                   ` Tim Deegan
2015-10-14 14:44                     ` Xu, Quan
2015-10-12  1:42 ` Zhang, Yang Z
2015-10-12 12:34   ` Jan Beulich
2015-10-13  5:27     ` Zhang, Yang Z
2015-10-13  9:15       ` Jan Beulich
2015-10-14  5:12         ` Zhang, Yang Z
2015-10-14  9:30           ` Jan Beulich
2015-10-15  1:03             ` Zhang, Yang Z
2015-10-15  6:46               ` Jan Beulich
2015-10-15  7:28                 ` Zhang, Yang Z
2015-10-15  8:25                   ` Jan Beulich
2015-10-15  8:52                     ` Zhang, Yang Z
2015-10-15  9:24                       ` Jan Beulich
2015-10-15  9:50                         ` Zhang, Yang Z

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