diff for duplicates of <55FA7F29.4050403@rock-chips.com> diff --git a/a/1.txt b/N1/1.txt index a666109..b985297 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,4 +1,4 @@ -On 2015年08月28日 16:59, Heiko Stuebner wrote: +On 2015?08?28? 16:59, Heiko Stuebner wrote: > Hi, > > Am Freitag, 28. August 2015, 13:46:46 schrieb Xing Zheng: @@ -119,7 +119,7 @@ Done. > Done. >> + ->> + cpu@f00 { +>> + cpu at f00 { >> + device_type = "cpu"; >> + compatible = "arm,cortex-a7"; >> + reg =<0xf00>; @@ -132,7 +132,7 @@ Done. >> + clocks =<&cru ARMCLK>; >> + resets =<&cru SRST_CORE0>; >> + }; ->> + cpu@f01 { +>> + cpu at f01 { >> + device_type = "cpu"; >> + compatible = "arm,cortex-a7"; >> + reg =<0xf01>; @@ -146,7 +146,7 @@ Done. >> + #size-cells =<1>; >> + ranges; >> + ->> + pdma: pdma@20078000 { +>> + pdma: pdma at 20078000 { >> + compatible = "arm,pl330", "arm,primecell"; >> + reg =<0x20078000 0x4000>; >> + interrupts =<GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, @@ -182,7 +182,7 @@ Done, but I don't quite understand. >> + always-on; >> + }; >> + ->> + cru: clock-controller@20000000 { +>> + cru: clock-controller at 20000000 { >> + compatible = "rockchip,rk3036-cru"; >> + reg =<0x20000000 0x1000>; >> + rockchip,grf =<&grf>; @@ -192,7 +192,7 @@ Done, but I don't quite understand. >> + assigned-clock-rates =<594000000>; >> + }; >> + ->> + uart0: serial@20060000 { +>> + uart0: serial at 20060000 { >> + compatible = "rockchip,rk3036-uart", "snps,dw-apb-uart"; >> + reg =<0x20060000 0x100>; >> + interrupts =<GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; @@ -205,7 +205,7 @@ Done, but I don't quite understand. >> + pinctrl-0 =<&uart0_xfer&uart0_cts&uart0_rts>; >> + }; >> + ->> + uart1: serial@20064000 { +>> + uart1: serial at 20064000 { >> + compatible = "rockchip,rk3036-uart", "snps,dw-apb-uart"; >> + reg =<0x20064000 0x100>; >> + interrupts =<GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; @@ -218,7 +218,7 @@ Done, but I don't quite understand. >> + pinctrl-0 =<&uart1_xfer>; >> + }; >> + ->> + uart2: serial@20068000 { +>> + uart2: serial at 20068000 { >> + compatible = "rockchip,rk3036-uart", "snps,dw-apb-uart"; >> + reg =<0x20068000 0x100>; >> + interrupts =<GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; @@ -231,7 +231,7 @@ Done, but I don't quite understand. >> + pinctrl-0 =<&uart2_xfer>; >> + }; >> + ->> + pwm0: pwm@20050000 { +>> + pwm0: pwm at 20050000 { >> + compatible = "rockchip,rk2928-pwm"; >> + reg =<0x20050000 0x10>; >> + #pwm-cells =<3>; @@ -242,7 +242,7 @@ Done, but I don't quite understand. >> + status = "disabled"; >> + }; >> + ->> + pwm1: pwm@20050010 { +>> + pwm1: pwm at 20050010 { >> + compatible = "rockchip,rk2928-pwm"; >> + reg =<0x20050010 0x10>; >> + #pwm-cells =<3>; @@ -253,7 +253,7 @@ Done, but I don't quite understand. >> + status = "disabled"; >> + }; >> + ->> + pwm2: pwm@20050020 { +>> + pwm2: pwm at 20050020 { >> + compatible = "rockchip,rk2928-pwm"; >> + reg =<0x20050020 0x10>; >> + #pwm-cells =<3>; @@ -264,7 +264,7 @@ Done, but I don't quite understand. >> + status = "disabled"; >> + }; >> + ->> + pwm3: pwm@20050030 { +>> + pwm3: pwm at 20050030 { >> + compatible = "rockchip,rk2928-pwm"; >> + reg =<0x20050030 0x10>; >> + #pwm-cells =<2>; @@ -275,13 +275,13 @@ Done, but I don't quite understand. >> + status = "disabled"; >> + }; >> + ->> + sram@10080000 { +>> + sram at 10080000 { >> + compatible = "mmio-sram"; >> + reg =<0x10080000 0x2000>; >> + map-exec; >> + }; >> + ->> + gic: interrupt-controller@10139000 { +>> + gic: interrupt-controller at 10139000 { >> + compatible = "arm,gic-400"; >> + interrupt-controller; >> + #interrupt-cells =<3>; @@ -293,7 +293,7 @@ Done, but I don't quite understand. Done, but I checked GIC_SPEC.pdf and I'm not sure it is correct... >> + }; >> + ->> + grf: syscon@20008000 { +>> + grf: syscon at 20008000 { >> + compatible = "rockchip,rk3036-grf", "syscon"; >> + reg =<0x20008000 0x1000>; >> + }; @@ -305,7 +305,7 @@ Done, but I checked GIC_SPEC.pdf and I'm not sure it is correct... >> + #size-cells =<1>; >> + ranges; >> + ->> + gpio0: gpio0@2007c000 { +>> + gpio0: gpio0 at 2007c000 { >> + compatible = "rockchip,gpio-bank"; >> + reg = <0x2007c000 0x100>; > please use a space after the "=" in "reg =<..." @@ -320,7 +320,7 @@ Done. >> + #interrupt-cells =<2>; >> + }; >> + ->> + gpio1: gpio1@20080000 { +>> + gpio1: gpio1 at 20080000 { >> + compatible = "rockchip,gpio-bank"; >> + reg =<0x20080000 0x100>; >> + interrupts =<GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; @@ -333,7 +333,7 @@ Done. >> + #interrupt-cells =<2>; >> + }; >> + ->> + gpio2: gpio2@20084000 { +>> + gpio2: gpio2 at 20084000 { >> + compatible = "rockchip,gpio-bank"; >> + reg =<0x20084000 0x100>; >> + interrupts =<GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; diff --git a/a/content_digest b/N1/content_digest index cf77d1d..5a33e55 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,23 +1,13 @@ "ref\01440740808-15004-1-git-send-email-zhengxing@rock-chips.com\0" "ref\01440740808-15004-2-git-send-email-zhengxing@rock-chips.com\0" "ref\01871781.cSEoq02CXi@phil\0" - "From\0Xing Zheng <zhengxing@rock-chips.com>\0" - "Subject\0Re: [PATCH v1 1/3] ARM: dts: rockchip: add core rk3036 dts\0" + "From\0zhengxing@rock-chips.com (Xing Zheng)\0" + "Subject\0[PATCH v1 1/3] ARM: dts: rockchip: add core rk3036 dts\0" "Date\0Thu, 17 Sep 2015 16:51:53 +0800\0" - "To\0Heiko Stuebner <heiko@sntech.de>\0" - "Cc\0linux-rockchip@lists.infradead.org" - Rob Herring <robh+dt@kernel.org> - Pawel Moll <pawel.moll@arm.com> - Mark Rutland <mark.rutland@arm.com> - Ian Campbell <ijc+devicetree@hellion.org.uk> - Kumar Gala <galak@codeaurora.org> - Russell King <linux@arm.linux.org.uk> - devicetree@vger.kernel.org - linux-arm-kernel@lists.infradead.org - " linux-kernel@vger.kernel.org\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" - "On 2015\345\271\26408\346\234\21028\346\227\245 16:59, Heiko Stuebner wrote:\n" + "On 2015?08?28? 16:59, Heiko Stuebner wrote:\n" "> Hi,\n" ">\n" "> Am Freitag, 28. August 2015, 13:46:46 schrieb Xing Zheng:\n" @@ -138,7 +128,7 @@ ">\n" "Done.\n" ">> +\n" - ">> +\t\tcpu@f00 {\n" + ">> +\t\tcpu at f00 {\n" ">> +\t\t\tdevice_type = \"cpu\";\n" ">> +\t\t\tcompatible = \"arm,cortex-a7\";\n" ">> +\t\t\treg =<0xf00>;\n" @@ -151,7 +141,7 @@ ">> +\t\t\tclocks =<&cru ARMCLK>;\n" ">> +\t\t\tresets =<&cru SRST_CORE0>;\n" ">> +\t\t};\n" - ">> +\t\tcpu@f01 {\n" + ">> +\t\tcpu at f01 {\n" ">> +\t\t\tdevice_type = \"cpu\";\n" ">> +\t\t\tcompatible = \"arm,cortex-a7\";\n" ">> +\t\t\treg =<0xf01>;\n" @@ -165,7 +155,7 @@ ">> +\t\t#size-cells =<1>;\n" ">> +\t\tranges;\n" ">> +\n" - ">> + pdma: pdma@20078000 {\n" + ">> + pdma: pdma at 20078000 {\n" ">> + compatible = \"arm,pl330\", \"arm,primecell\";\n" ">> + reg =<0x20078000 0x4000>;\n" ">> + interrupts =<GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,\n" @@ -201,7 +191,7 @@ ">> +\t\talways-on;\n" ">> +\t};\n" ">> +\n" - ">> +\tcru: clock-controller@20000000 {\n" + ">> +\tcru: clock-controller at 20000000 {\n" ">> +\t\tcompatible = \"rockchip,rk3036-cru\";\n" ">> +\t\treg =<0x20000000 0x1000>;\n" ">> +\t\trockchip,grf =<&grf>;\n" @@ -211,7 +201,7 @@ ">> +\t\tassigned-clock-rates =<594000000>;\n" ">> +\t};\n" ">> +\n" - ">> +\tuart0: serial@20060000 {\n" + ">> +\tuart0: serial at 20060000 {\n" ">> +\t\tcompatible = \"rockchip,rk3036-uart\", \"snps,dw-apb-uart\";\n" ">> +\t\treg =<0x20060000 0x100>;\n" ">> +\t\tinterrupts =<GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -224,7 +214,7 @@ ">> +\t\tpinctrl-0 =<&uart0_xfer&uart0_cts&uart0_rts>;\n" ">> +\t};\n" ">> +\n" - ">> +\tuart1: serial@20064000 {\n" + ">> +\tuart1: serial at 20064000 {\n" ">> +\t\tcompatible = \"rockchip,rk3036-uart\", \"snps,dw-apb-uart\";\n" ">> +\t\treg =<0x20064000 0x100>;\n" ">> +\t\tinterrupts =<GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -237,7 +227,7 @@ ">> +\t\tpinctrl-0 =<&uart1_xfer>;\n" ">> +\t};\n" ">> +\n" - ">> +\tuart2: serial@20068000 {\n" + ">> +\tuart2: serial at 20068000 {\n" ">> +\t\tcompatible = \"rockchip,rk3036-uart\", \"snps,dw-apb-uart\";\n" ">> +\t\treg =<0x20068000 0x100>;\n" ">> +\t\tinterrupts =<GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -250,7 +240,7 @@ ">> +\t\tpinctrl-0 =<&uart2_xfer>;\n" ">> +\t};\n" ">> +\n" - ">> +\tpwm0: pwm@20050000 {\n" + ">> +\tpwm0: pwm at 20050000 {\n" ">> +\t\tcompatible = \"rockchip,rk2928-pwm\";\n" ">> +\t\treg =<0x20050000 0x10>;\n" ">> +\t\t#pwm-cells =<3>;\n" @@ -261,7 +251,7 @@ ">> +\t\tstatus = \"disabled\";\n" ">> +\t};\n" ">> +\n" - ">> +\tpwm1: pwm@20050010 {\n" + ">> +\tpwm1: pwm at 20050010 {\n" ">> +\t\tcompatible = \"rockchip,rk2928-pwm\";\n" ">> +\t\treg =<0x20050010 0x10>;\n" ">> +\t\t#pwm-cells =<3>;\n" @@ -272,7 +262,7 @@ ">> +\t\tstatus = \"disabled\";\n" ">> +\t};\n" ">> +\n" - ">> +\tpwm2: pwm@20050020 {\n" + ">> +\tpwm2: pwm at 20050020 {\n" ">> +\t\tcompatible = \"rockchip,rk2928-pwm\";\n" ">> +\t\treg =<0x20050020 0x10>;\n" ">> +\t\t#pwm-cells =<3>;\n" @@ -283,7 +273,7 @@ ">> +\t\tstatus = \"disabled\";\n" ">> +\t};\n" ">> +\n" - ">> +\tpwm3: pwm@20050030 {\n" + ">> +\tpwm3: pwm at 20050030 {\n" ">> +\t\tcompatible = \"rockchip,rk2928-pwm\";\n" ">> +\t\treg =<0x20050030 0x10>;\n" ">> +\t\t#pwm-cells =<2>;\n" @@ -294,13 +284,13 @@ ">> +\t\tstatus = \"disabled\";\n" ">> +\t};\n" ">> +\n" - ">> +\tsram@10080000 {\n" + ">> +\tsram at 10080000 {\n" ">> +\t\tcompatible = \"mmio-sram\";\n" ">> +\t\treg =<0x10080000 0x2000>;\n" ">> +\t\tmap-exec;\n" ">> +\t};\n" ">> +\n" - ">> +\tgic: interrupt-controller@10139000 {\n" + ">> +\tgic: interrupt-controller at 10139000 {\n" ">> +\t\tcompatible = \"arm,gic-400\";\n" ">> +\t\tinterrupt-controller;\n" ">> +\t\t#interrupt-cells =<3>;\n" @@ -312,7 +302,7 @@ "Done, but I checked GIC_SPEC.pdf and I'm not sure it is correct...\n" ">> +\t};\n" ">> +\n" - ">> +\tgrf: syscon@20008000 {\n" + ">> +\tgrf: syscon at 20008000 {\n" ">> +\t\tcompatible = \"rockchip,rk3036-grf\", \"syscon\";\n" ">> +\t\treg =<0x20008000 0x1000>;\n" ">> +\t};\n" @@ -324,7 +314,7 @@ ">> +\t\t#size-cells =<1>;\n" ">> +\t\tranges;\n" ">> +\n" - ">> +\t\tgpio0: gpio0@2007c000 {\n" + ">> +\t\tgpio0: gpio0 at 2007c000 {\n" ">> +\t\t\tcompatible = \"rockchip,gpio-bank\";\n" ">> +\t\t\treg =\t<0x2007c000 0x100>;\n" "> please use a space after the \"=\" in \"reg =<...\"\n" @@ -339,7 +329,7 @@ ">> +\t\t\t#interrupt-cells =<2>;\n" ">> +\t\t};\n" ">> +\n" - ">> +\t\tgpio1: gpio1@20080000 {\n" + ">> +\t\tgpio1: gpio1 at 20080000 {\n" ">> +\t\t\tcompatible = \"rockchip,gpio-bank\";\n" ">> +\t\t\treg =<0x20080000 0x100>;\n" ">> +\t\t\tinterrupts =<GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -352,7 +342,7 @@ ">> +\t\t\t#interrupt-cells =<2>;\n" ">> +\t\t};\n" ">> +\n" - ">> +\t\tgpio2: gpio2@20084000 {\n" + ">> +\t\tgpio2: gpio2 at 20084000 {\n" ">> +\t\t\tcompatible = \"rockchip,gpio-bank\";\n" ">> +\t\t\treg =<0x20084000 0x100>;\n" ">> +\t\t\tinterrupts =<GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -444,4 +434,4 @@ ">> +};\n" > -aad645a93f3bd35093f714ed244f3e84e64e4dbcb4b0f21e0c90b19e3f724ef5 +d5c83d9d5b2210739692740a1ea8ba1d41b49aefc84bd6fb3cfd647fb43120d7
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