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From: Hans de Goede <hdegoede@redhat.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [linux-sunxi] [PATCH 6/6] sunxi: Add CHIP support
Date: Fri, 18 Sep 2015 10:55:48 -0400	[thread overview]
Message-ID: <55FC25F4.70503@redhat.com> (raw)
In-Reply-To: <1442577980-26373-7-git-send-email-maxime.ripard@free-electrons.com>

Hi,

On 09/18/2015 08:06 AM, Maxime Ripard wrote:
> The C.H.I.P. is a small SBC with an Allwinner R8, 8GB of NAND, 512MB of
> RAM, USB host and OTG, a wifi / bluetooth combo chip, an audio/video jack
> and two connectors to plug additional boards on top of it.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> ---
>   arch/arm/dts/Makefile          |   3 +-
>   arch/arm/dts/sun5i-r8-chip.dts | 261 +++++++++++++++++++++++++++++++++++++++++
>   configs/CHIP_defconfig         |  14 +++
>   3 files changed, 277 insertions(+), 1 deletion(-)
>   create mode 100644 arch/arm/dts/sun5i-r8-chip.dts
>   create mode 100644 configs/CHIP_defconfig
>
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 0a8c88de9e32..4d09e3de71f9 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -111,7 +111,8 @@ dtb-$(CONFIG_MACH_SUN5I) += \
>   	sun5i-a13-olinuxino-micro.dtb \
>   	sun5i-a13-q8-tablet.dtb \
>   	sun5i-a13-tzx-q8-713b7.dtb \
> -	sun5i-a13-utoo-p66.dtb
> +	sun5i-a13-utoo-p66.dtb \
> +	sun5i-r8-chip.dtb
>   dtb-$(CONFIG_MACH_SUN6I) += \
>   	sun6i-a31-app4-evb1.dtb \
>   	sun6i-a31-colombus.dtb \
> diff --git a/arch/arm/dts/sun5i-r8-chip.dts b/arch/arm/dts/sun5i-r8-chip.dts
> new file mode 100644
> index 000000000000..6cb3c4f1cd61
> --- /dev/null
> +++ b/arch/arm/dts/sun5i-r8-chip.dts
> @@ -0,0 +1,261 @@
> +/*
> + * Copyright 2015 Free Electrons
> + * Copyright 2015 NextThing Co
> + *
> + * Maxime Ripard <maxime.ripard@free-electrons.com>
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + *  a) This file is free software; you can redistribute it and/or
> + *     modify it under the terms of the GNU General Public License as
> + *     published by the Free Software Foundation; either version 2 of the
> + *     License, or (at your option) any later version.
> + *
> + *     This file is distributed in the hope that it will be useful,
> + *     but WITHOUT ANY WARRANTY; without even the implied warranty of
> + *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + *     GNU General Public License for more details.
> + *
> + * Or, alternatively,
> + *
> + *  b) Permission is hereby granted, free of charge, to any person
> + *     obtaining a copy of this software and associated documentation
> + *     files (the "Software"), to deal in the Software without
> + *     restriction, including without limitation the rights to use,
> + *     copy, modify, merge, publish, distribute, sublicense, and/or
> + *     sell copies of the Software, and to permit persons to whom the
> + *     Software is furnished to do so, subject to the following
> + *     conditions:
> + *
> + *     The above copyright notice and this permission notice shall be
> + *     included in all copies or substantial portions of the Software.
> + *
> + *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> + *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> + *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + *     OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +/dts-v1/;
> +#include "sun5i-a13.dtsi"
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/interrupt-controller/irq.h>
> +
> +/ {
> +	model = "NextThing C.H.I.P.";
> +	compatible = "nextthing,chip", "allwinner,sun5i-r8";
> +
> +	aliases {
> +		i2c0 = &i2c0;
> +		i2c1 = &i2c1;
> +		i2c2 = &i2c2;
> +		serial0 = &uart1;
> +		serial1 = &uart3;
> +	};
> +
> +	chosen {
> +		stdout-path = "serial0:115200n8";
> +	};
> +
> +	dram_vcc: dram_vcc {
> +		compatible = "regulator-fixed";
> +		regulator-name = "dram-vcc";
> +		regulator-min-microvolt = <1600000>;
> +		regulator-max-microvolt = <1600000>;
> +		vin-supply = <&ipsout>;
> +		regulator-always-on;
> +	};
> +
> +	ipsout: ipsout {
> +		compatible = "regulator-fixed";
> +		regulator-name = "ipsout";
> +		regulator-min-microvolt = <5000000>;
> +		regulator-max-microvolt = <5000000>;
> +		regulator-always-on;
> +	};
> +
> +	usb0_vbus: usb0_vbus {
> +		compatible = "regulator-fixed";
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&chip_vbus_pin>;
> +
> +		regulator-name = "vbus-usb0";
> +		regulator-min-microvolt = <5000000>;
> +		regulator-max-microvolt = <5000000>;
> +		vin-supply = <&vcc_5v0>;
> +		gpio = <&pio 1 10 GPIO_ACTIVE_HIGH>; /* PB10 */
> +		enable-active-high;
> +	};
> +
> +	vcc_3v3: vcc3v3 {
> +		compatible = "regulator-fixed";
> +		regulator-name = "vcc-3v3";
> +		regulator-min-microvolt = <3300000>;
> +		regulator-max-microvolt = <3300000>;
> +		vin-supply = <&ipsout>;
> +		regulator-always-on;
> +	};
> +
> +	vcc_5v0: vcc5v0 {
> +		compatible = "regulator-fixed";
> +		regulator-name = "vcc-5v0";
> +		regulator-min-microvolt = <5000000>;
> +		regulator-max-microvolt = <5000000>;
> +		vin-supply = <&ipsout>;
> +		regulator-always-on;
> +	};
> +};
> +
> +&ehci0 {
> +	status = "okay";
> +};
> +
> +&i2c0 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&i2c0_pins_a>;
> +	status = "okay";
> +
> +	axp209: pmic at 34 {
> +		reg = <0x34>;
> +
> +		/*
> +		 * The interrupt is routed through the "External Fast
> +                 * Interrupt Request" pin (ball G13 of the module)
> +                 * directly to the main interrupt controller, without
> +                 * any other controller interfering.
> +		 */
> +		interrupts = <0>;
> +	};
> +};
> +
> +#include "axp209.dtsi"
> +
> +/*
> + * i2c1 is routed to the external pins and doesn't have any device
> + * attached to it on the C.H.I.P itself.
> + */
> +&i2c1 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&i2c1_pins_a>;
> +	status = "okay";
> +};
> +
> +&i2c2 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&i2c2_pins_a>;
> +	status = "okay";
> +
> +	xio: gpio at 38 {
> +		compatible = "nxp,pcf8574a";
> +		reg = <0x38>;
> +
> +		gpio-controller;
> +		#gpio-cells = <2>;
> +
> +		interrupt-parent = <&pio>;
> +		interrupts = <6 0 IRQ_TYPE_EDGE_FALLING>;
> +		interrupt-controller;
> +		#interrupt-cells = <2>;
> +	};
> +};
> +
> +&mmc0 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&mmc0_pins_a>;
> +	vmmc-supply = <&vcc_3v3>;
> +	bus-width = <4>;
> +	non-removable;
> +	status = "okay";
> +};
> +
> +&ohci0 {
> +	status = "okay";
> +};
> +
> +&otg_sram {
> +	status = "okay";
> +};
> +
> +&pio {
> +	chip_vbus_pin: chip_vbus_pin at 0 {
> +	        allwinner,pins = "PB10";
> +	        allwinner,function = "gpio_out";
> +	        allwinner,drive = <SUN4I_PINCTRL_10_MA>;
> +	        allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
> +	};
> +
> +	chip_id_det_pin: chip_id_det_pin at 0 {
> +	        allwinner,pins = "PG2";
> +	        allwinner,function = "gpio_in";
> +	        allwinner,drive = <SUN4I_PINCTRL_10_MA>;
> +	        allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
> +	};
> +};
> +
> +&reg_dcdc2 {
> +	regulator-min-microvolt = <1000000>;
> +	regulator-max-microvolt = <1400000>;
> +	regulator-name = "cpuvdd";
> +	regulator-always-on;
> +};
> +
> +&reg_dcdc3 {
> +	regulator-min-microvolt = <1000000>;
> +	regulator-max-microvolt = <1300000>;
> +	regulator-name = "corevdd";
> +	regulator-always-on;
> +};
> +
> +&reg_ldo1 {
> +	regulator-name = "rtcvdd";
> +};
> +
> +&reg_ldo2 {
> +	regulator-min-microvolt = <2700000>;
> +	regulator-max-microvolt = <3300000>;
> +	regulator-name = "avcc";
> +	regulator-always-on;
> +};
> +
> +&reg_ldo5 {
> +	regulator-min-microvolt = <1800000>;
> +	regulator-max-microvolt = <1800000>;
> +	regulator-name = "vcc-1v8";
> +};
> +
> +&uart1 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&uart1_pins_b>;
> +	status = "okay";
> +};
> +
> +&uart3 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&uart3_pins_a>,
> +		    <&uart3_pins_cts_rts_a>;
> +	status = "okay";
> +};
> +
> +&usb_otg {
> +	dr_mode = "otg";
> +	status = "okay";
> +};
> +
> +&usbphy {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&chip_id_det_pin>;
> +	status = "okay";
> +
> +	usb0_id_det-gpio = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */
> +
> +	usb0_vbus-supply = <&usb0_vbus>;
> +	usb1_vbus-supply = <&vcc_5v0>;
> +};
> diff --git a/configs/CHIP_defconfig b/configs/CHIP_defconfig
> new file mode 100644
> index 000000000000..feab46d26ddd
> --- /dev/null
> +++ b/configs/CHIP_defconfig
> @@ -0,0 +1,14 @@
> +CONFIG_SPL=y
> +CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2,AXP209_POWER,NO_MMC"

The NO_MMC bit needs to be replaced with:

# CONFIG_MMC is not set

Other then that this one looks good to me.

Regards,

Hans


> +CONFIG_DEFAULT_DEVICE_TREE="sun5i-r8-chip"
> +CONFIG_USB_MUSB_GADGET=y
> +CONFIG_USB_MUSB_SUNXI=y
> +CONFIG_USB0_VBUS_PIN="PB10"
> +CONFIG_ARM=y
> +CONFIG_ARCH_SUNXI=y
> +CONFIG_MACH_SUN5I=y
> +CONFIG_DRAM_CLK=360
> +CONFIG_DRAM_ZQ=123
> +CONFIG_DRAM_EMR1=4
> +CONFIG_DRAM_TIMINGS_DDR3_800E_1066G_1333J=y
> +# CONFIG_CMD_IMLS is not set
>

  reply	other threads:[~2015-09-18 14:55 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-09-18 12:06 [U-Boot] [PATCH 0/6] ARM: sunxi: Introduce CHIP support Maxime Ripard
2015-09-18 12:06 ` [U-Boot] [PATCH 1/6] sunxi: Add an option to disable MMC Maxime Ripard
2015-09-18 14:52   ` [U-Boot] [linux-sunxi] " Hans de Goede
2015-09-22  9:12     ` Maxime Ripard
2015-09-18 15:02   ` [U-Boot] " Tom Rini
2015-09-18 15:04     ` Hans de Goede
2015-09-22  9:15     ` Maxime Ripard
2015-09-18 12:06 ` [U-Boot] [PATCH 2/6] fastboot: Implement OEM format only when we have MMC support Maxime Ripard
2015-09-18 14:53   ` [U-Boot] [linux-sunxi] " Hans de Goede
2015-09-22  9:02     ` Maxime Ripard
2015-09-18 15:02   ` [U-Boot] " Tom Rini
2015-09-22  9:00     ` Maxime Ripard
2015-09-18 12:06 ` [U-Boot] [PATCH 3/6] sunxi: Add the R8 DTSI Maxime Ripard
2015-09-18 15:02   ` Tom Rini
2015-09-18 15:17     ` [U-Boot] [linux-sunxi] " Hans de Goede
2015-09-18 15:39       ` Tom Rini
2015-09-18 15:39         ` Hans de Goede
2015-09-18 15:49           ` Tom Rini
2015-09-18 23:31           ` Julian Calaby
2015-09-19 11:13             ` Tom Rini
2015-09-22  9:22               ` Maxime Ripard
2015-09-18 15:08   ` [U-Boot] " Ian Campbell
2015-09-22  9:17     ` Maxime Ripard
2015-09-22  9:20       ` Ian Campbell
2015-09-22 12:08         ` Maxime Ripard
2015-09-18 12:06 ` [U-Boot] [PATCH 4/6] ARM: sun5i: dt: Move uart3 pinctrl node to common DTSI Maxime Ripard
2015-09-18 15:02   ` Tom Rini
2015-09-18 12:06 ` [U-Boot] [PATCH 5/6] ARM: sun5i: dt: Add UART3 CTS and RTS pins Maxime Ripard
2015-09-18 15:02   ` Tom Rini
2015-09-18 12:06 ` [U-Boot] [PATCH 6/6] sunxi: Add CHIP support Maxime Ripard
2015-09-18 14:55   ` Hans de Goede [this message]
2015-09-18 15:02   ` Tom Rini

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