From: Amit Nischal <anischal@codeaurora.org>
To: Rob Herring <robh@kernel.org>
Cc: Stephen Boyd <sboyd@codeaurora.org>,
Michael Turquette <mturquette@baylibre.com>,
Andy Gross <andy.gross@linaro.org>,
David Brown <david.brown@linaro.org>,
Rajendra Nayak <rnayak@codeaurora.org>,
Odelu Kukatla <okukatla@codeaurora.org>,
Taniya Das <tdas@codeaurora.org>,
linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org
Subject: Re: [PATCH 1/2] dt-bindings: clock: Introduce QCOM Video clock bindings
Date: Wed, 02 May 2018 13:15:12 +0530 [thread overview]
Message-ID: <55ef90a4034f5c7e94274c1ea02d3af1@codeaurora.org> (raw)
In-Reply-To: <20180501135054.GA373@rob-hp-laptop>
On 2018-05-01 19:20, Rob Herring wrote:
> On Tue, Apr 24, 2018 at 07:02:50PM +0530, Amit Nischal wrote:
>> Add device tree bindings for video clock controller for Qualcomm
>> Technology Inc's SoCs.
>>
>> Signed-off-by: Amit Nischal <anischal@codeaurora.org>
>> ---
>> .../devicetree/bindings/clock/qcom,videocc.txt | 18
>> ++++++++++++++++
>> include/dt-bindings/clock/qcom,videocc-sdm845.h | 25
>> ++++++++++++++++++++++
>> 2 files changed, 43 insertions(+)
>> create mode 100644
>> Documentation/devicetree/bindings/clock/qcom,videocc.txt
>> create mode 100644 include/dt-bindings/clock/qcom,videocc-sdm845.h
>>
>> diff --git a/Documentation/devicetree/bindings/clock/qcom,videocc.txt
>> b/Documentation/devicetree/bindings/clock/qcom,videocc.txt
>> new file mode 100644
>> index 0000000..1c23b41
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/clock/qcom,videocc.txt
>> @@ -0,0 +1,18 @@
>> +Qualcomm Video Clock & Reset Controller Binding
>> +-----------------------------------------------
>> +
>> +Required properties :
>> +- compatible : shall contain "qcom,videocc-sdm845"
>
> '<vendor>,<soc>-<block>' is the preferred order.
>
> Every single QCom binding... Can someone spread the word in QCom.
Thanks for the review. I will make the suggested change in the next
series.
>
>> +- reg : shall contain base register location and length
>> +- #clock-cells : shall contain 1
>> +- #reset-cells : shall contain 1
>> +- #power-domain-cells : shall contain 1
>
> No header definitions for resets and power-domain? There's no
> requirement to have headers, but the binding should be complete even if
> you don't have a driver yet.
Will do the required changes in the next patch series.
>
>> +
>> +Example:
>> + videocc: qcom,videocc@ab00000 {
>
> clock-controller@...
Will be fixed in the next patch series.
>
>> + compatible = "qcom,videocc-sdm845";
>> + reg = <0xab00000 0x10000>;
>> + #clock-cells = <1>;
>> + #reset-cells = <1>;
>> + #power-domain-cells = <1>;
>> + };
>> diff --git a/include/dt-bindings/clock/qcom,videocc-sdm845.h
>> b/include/dt-bindings/clock/qcom,videocc-sdm845.h
>> new file mode 100644
>> index 0000000..f5f7599
>> --- /dev/null
>> +++ b/include/dt-bindings/clock/qcom,videocc-sdm845.h
>> @@ -0,0 +1,25 @@
>> +/* SPDX-License-Identifier: GPL-2.0 */
>> +/* Copyright (c) 2016-2018, The Linux Foundation. All rights
>> reserved. */
>> +
>> +#ifndef _DT_BINDINGS_CLK_MSM_VIDEO_CC_SDM845_H
>> +#define _DT_BINDINGS_CLK_MSM_VIDEO_CC_SDM845_H
>> +
>> +#define VIDEO_CC_APB_CLK 0
>> +#define VIDEO_CC_AT_CLK 1
>> +#define VIDEO_CC_QDSS_TRIG_CLK 2
>> +#define VIDEO_CC_QDSS_TSCTR_DIV8_CLK 3
>> +#define VIDEO_CC_VCODEC0_AXI_CLK 4
>> +#define VIDEO_CC_VCODEC0_CORE_CLK 5
>> +#define VIDEO_CC_VCODEC1_AXI_CLK 6
>> +#define VIDEO_CC_VCODEC1_CORE_CLK 7
>> +#define VIDEO_CC_VENUS_AHB_CLK 8
>> +#define VIDEO_CC_VENUS_CLK_SRC 9
>> +#define VIDEO_CC_VENUS_CTL_AXI_CLK 10
>> +#define VIDEO_CC_VENUS_CTL_CORE_CLK 11
>> +#define VIDEO_PLL0 12
>> +
>> +#define VENUS_GDSC 0
>> +#define VCODEC0_GDSC 1
>> +#define VCODEC1_GDSC 2
>> +
>> +#endif
>> --
>> QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a
>> member
>> of Code Aurora Forum, hosted by The Linux Foundation
>>
>> --
>> To unsubscribe from this list: send the line "unsubscribe devicetree"
>> in
>> the body of a message to majordomo@vger.kernel.org
>> More majordomo info at http://vger.kernel.org/majordomo-info.html
next prev parent reply other threads:[~2018-05-02 7:45 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-04-24 13:32 [PATCH 0/2] Add QCOM video clock controller driver Amit Nischal
2018-04-24 13:32 ` [PATCH 1/2] dt-bindings: clock: Introduce QCOM Video clock bindings Amit Nischal
2018-05-01 13:50 ` Rob Herring
2018-05-02 7:45 ` Amit Nischal [this message]
2018-04-24 13:32 ` [PATCH 2/2] clk: qcom: Add video clock controller driver for SDM845 Amit Nischal
2018-05-01 21:41 ` Stephen Boyd
2018-05-01 21:41 ` Stephen Boyd
2018-05-01 21:41 ` Stephen Boyd
2018-05-02 7:56 ` Nischal, Amit
2018-05-02 18:47 ` Stephen Boyd
2018-05-02 18:47 ` Stephen Boyd
2018-05-03 10:36 ` Amit Nischal
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=55ef90a4034f5c7e94274c1ea02d3af1@codeaurora.org \
--to=anischal@codeaurora.org \
--cc=andy.gross@linaro.org \
--cc=david.brown@linaro.org \
--cc=devicetree@vger.kernel.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-soc@vger.kernel.org \
--cc=mturquette@baylibre.com \
--cc=okukatla@codeaurora.org \
--cc=rnayak@codeaurora.org \
--cc=robh@kernel.org \
--cc=sboyd@codeaurora.org \
--cc=tdas@codeaurora.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.