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diff --git a/a/1.txt b/N1/1.txt
index 7908891..845a360 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -3,14 +3,14 @@ On 09/17/2015 11:37 PM, Masahiro Yamada wrote:
 > All the UniPhier SoCs are equipped with the L2 cache, while the L3
 > cache is currently only integrated on PH1-Pro5 SoC.
 > 
-> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
+> Signed-off-by: Masahiro Yamada <yamada.masahiro-uWyLwvC0a2jby3iVrkZq2A@public.gmane.org>
 > ---
 > 
 >  .../bindings/arm/uniphier/cache-uniphier.txt       |  48 ++
 
 For the binding:
 
-Acked-by: Rob Herring <robh@kernel.org>
+Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
 
 >  MAINTAINERS                                        |   2 +
 >  arch/arm/include/asm/hardware/cache-uniphier.h     |  46 ++
@@ -55,7 +55,7 @@ Acked-by: Rob Herring <robh@kernel.org>
 > +indicated correctly with "next-level-cache" properties.
 > +
 > +Example:
-> +	l2: l2-cache at 500c0000 {
+> +	l2: l2-cache@500c0000 {
 > +		compatible = "socionext,uniphier-system-cache";
 > +		reg = <0x500c0000 0x2000>, <0x503c0100 0x8>,
 > +		      <0x506c0000 0x400>;
@@ -67,7 +67,7 @@ Acked-by: Rob Herring <robh@kernel.org>
 > +		next-level-cache = <&l3>;
 > +	};
 > +
-> +	l3: l3-cache at 500c8000 {
+> +	l3: l3-cache@500c8000 {
 > +		compatible = "socionext,uniphier-system-cache";
 > +		reg = <0x500c8000 0x2000>, <0x503c8100 0x8>,
 > +		      <0x506c8000 0x400>;
@@ -81,8 +81,8 @@ Acked-by: Rob Herring <robh@kernel.org>
 > index 7ba7ab7..e9c5dd9 100644
 > --- a/MAINTAINERS
 > +++ b/MAINTAINERS
-> @@ -1600,7 +1600,9 @@ M:	Masahiro Yamada <yamada.masahiro@socionext.com>
->  L:	linux-arm-kernel at lists.infradead.org (moderated for non-subscribers)
+> @@ -1600,7 +1600,9 @@ M:	Masahiro Yamada <yamada.masahiro-uWyLwvC0a2jby3iVrkZq2A@public.gmane.org>
+>  L:	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org (moderated for non-subscribers)
 >  S:	Maintained
 >  F:	arch/arm/boot/dts/uniphier*
 > +F:	arch/arm/include/asm/hardware/cache-uniphier.h
@@ -98,7 +98,7 @@ Acked-by: Rob Herring <robh@kernel.org>
 > +++ b/arch/arm/include/asm/hardware/cache-uniphier.h
 > @@ -0,0 +1,46 @@
 > +/*
-> + * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+> + * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro-uWyLwvC0a2jby3iVrkZq2A@public.gmane.org>
 > + *
 > + * This program is free software; you can redistribute it and/or modify
 > + * it under the terms of the GNU General Public License as published by
@@ -201,7 +201,7 @@ Acked-by: Rob Herring <robh@kernel.org>
 > +++ b/arch/arm/mm/cache-uniphier.c
 > @@ -0,0 +1,544 @@
 > +/*
-> + * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+> + * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro-uWyLwvC0a2jby3iVrkZq2A@public.gmane.org>
 > + *
 > + * This program is free software; you can redistribute it and/or modify
 > + * it under the terms of the GNU General Public License as published by
@@ -744,4 +744,9 @@ Acked-by: Rob Herring <robh@kernel.org>
 > +
 > +	return ret;
 > +}
->
+> 
+
+--
+To unsubscribe from this list: send the line "unsubscribe devicetree" in
+the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
+More majordomo info at  http://vger.kernel.org/majordomo-info.html
diff --git a/a/content_digest b/N1/content_digest
index 5012a4b..fbd7829 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,9 +1,34 @@
  "ref\01442551054-2116-1-git-send-email-yamada.masahiro@socionext.com\0"
  "ref\01442551054-2116-2-git-send-email-yamada.masahiro@socionext.com\0"
- "From\0robh@kernel.org (Rob Herring)\0"
- "Subject\0[PATCH v3 1/3] ARM: uniphier: add outer cache support\0"
+ "ref\01442551054-2116-2-git-send-email-yamada.masahiro-uWyLwvC0a2jby3iVrkZq2A@public.gmane.org\0"
+ "From\0Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>\0"
+ "Subject\0Re: [PATCH v3 1/3] ARM: uniphier: add outer cache support\0"
  "Date\0Mon, 21 Sep 2015 09:06:32 -0500\0"
- "To\0linux-arm-kernel@lists.infradead.org\0"
+ "To\0Masahiro Yamada <yamada.masahiro-uWyLwvC0a2jby3iVrkZq2A@public.gmane.org>\0"
+ "Cc\0linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
+  arm-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org
+  Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org>
+  Jiri Slaby <jslaby-IBi9RG/b67k@public.gmane.org>
+  Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
+  Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
+  Jungseung Lee <js07.lee-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
+  Ian Campbell <ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org>
+  Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
+  Stefan Agner <stefan-XLVq0VzYD2Y@public.gmane.org>
+  Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org>
+  Maxime Coquelin <mcoquelin.stm32-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
+  Andrew Morton <akpm-de/tnXTf+JLsfHDXvbKv3WD2FQJk+8+b@public.gmane.org>
+  Tomasz Figa <t.figa-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
+  devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
+  Jiang Liu <jiang.liu-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
+  Mauro Carvalho Chehab <mchehab-JPH+aEBZ4P+UEJcrhfAQsw@public.gmane.org>
+  Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org>
+  Nicolas Pitre <nico-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
+  Marek Szyprowski <m.szyprowski-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
+  Nathan Lynch <nathan_lynch-nmGgyN9QBj3QT0dZR+AlfA@public.gmane.org>
+  Kees Cook <keescook-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
+  Paul Bolle <pebolle-IWqWACnzNjzz+pZb47iToQ@public.gmane.org>
+ " Greg KH <gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org>l\0"
  "\00:1\0"
  "b\0"
  "On 09/17/2015 11:37 PM, Masahiro Yamada wrote:\n"
@@ -11,14 +36,14 @@
  "> All the UniPhier SoCs are equipped with the L2 cache, while the L3\n"
  "> cache is currently only integrated on PH1-Pro5 SoC.\n"
  "> \n"
- "> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>\n"
+ "> Signed-off-by: Masahiro Yamada <yamada.masahiro-uWyLwvC0a2jby3iVrkZq2A@public.gmane.org>\n"
  "> ---\n"
  "> \n"
  ">  .../bindings/arm/uniphier/cache-uniphier.txt       |  48 ++\n"
  "\n"
  "For the binding:\n"
  "\n"
- "Acked-by: Rob Herring <robh@kernel.org>\n"
+ "Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>\n"
  "\n"
  ">  MAINTAINERS                                        |   2 +\n"
  ">  arch/arm/include/asm/hardware/cache-uniphier.h     |  46 ++\n"
@@ -63,7 +88,7 @@
  "> +indicated correctly with \"next-level-cache\" properties.\n"
  "> +\n"
  "> +Example:\n"
- "> +\tl2: l2-cache at 500c0000 {\n"
+ "> +\tl2: l2-cache@500c0000 {\n"
  "> +\t\tcompatible = \"socionext,uniphier-system-cache\";\n"
  "> +\t\treg = <0x500c0000 0x2000>, <0x503c0100 0x8>,\n"
  "> +\t\t      <0x506c0000 0x400>;\n"
@@ -75,7 +100,7 @@
  "> +\t\tnext-level-cache = <&l3>;\n"
  "> +\t};\n"
  "> +\n"
- "> +\tl3: l3-cache at 500c8000 {\n"
+ "> +\tl3: l3-cache@500c8000 {\n"
  "> +\t\tcompatible = \"socionext,uniphier-system-cache\";\n"
  "> +\t\treg = <0x500c8000 0x2000>, <0x503c8100 0x8>,\n"
  "> +\t\t      <0x506c8000 0x400>;\n"
@@ -89,8 +114,8 @@
  "> index 7ba7ab7..e9c5dd9 100644\n"
  "> --- a/MAINTAINERS\n"
  "> +++ b/MAINTAINERS\n"
- "> @@ -1600,7 +1600,9 @@ M:\tMasahiro Yamada <yamada.masahiro@socionext.com>\n"
- ">  L:\tlinux-arm-kernel at lists.infradead.org (moderated for non-subscribers)\n"
+ "> @@ -1600,7 +1600,9 @@ M:\tMasahiro Yamada <yamada.masahiro-uWyLwvC0a2jby3iVrkZq2A@public.gmane.org>\n"
+ ">  L:\tlinux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org (moderated for non-subscribers)\n"
  ">  S:\tMaintained\n"
  ">  F:\tarch/arm/boot/dts/uniphier*\n"
  "> +F:\tarch/arm/include/asm/hardware/cache-uniphier.h\n"
@@ -106,7 +131,7 @@
  "> +++ b/arch/arm/include/asm/hardware/cache-uniphier.h\n"
  "> @@ -0,0 +1,46 @@\n"
  "> +/*\n"
- "> + * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>\n"
+ "> + * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro-uWyLwvC0a2jby3iVrkZq2A@public.gmane.org>\n"
  "> + *\n"
  "> + * This program is free software; you can redistribute it and/or modify\n"
  "> + * it under the terms of the GNU General Public License as published by\n"
@@ -209,7 +234,7 @@
  "> +++ b/arch/arm/mm/cache-uniphier.c\n"
  "> @@ -0,0 +1,544 @@\n"
  "> +/*\n"
- "> + * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>\n"
+ "> + * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro-uWyLwvC0a2jby3iVrkZq2A@public.gmane.org>\n"
  "> + *\n"
  "> + * This program is free software; you can redistribute it and/or modify\n"
  "> + * it under the terms of the GNU General Public License as published by\n"
@@ -752,6 +777,11 @@
  "> +\n"
  "> +\treturn ret;\n"
  "> +}\n"
- >
+ "> \n"
+ "\n"
+ "--\n"
+ "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n"
+ "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n"
+ More majordomo info at  http://vger.kernel.org/majordomo-info.html
 
-3b16918ca5cacd85689c918b07e96faf5c93732e69972574d50ce25b4291b453
+d14b288cd4fab6968ea6ec9536d5d709dd5881d0163663965539abb334621889

diff --git a/a/1.txt b/N2/1.txt
index 7908891..cfeab18 100644
--- a/a/1.txt
+++ b/N2/1.txt
@@ -55,7 +55,7 @@ Acked-by: Rob Herring <robh@kernel.org>
 > +indicated correctly with "next-level-cache" properties.
 > +
 > +Example:
-> +	l2: l2-cache at 500c0000 {
+> +	l2: l2-cache@500c0000 {
 > +		compatible = "socionext,uniphier-system-cache";
 > +		reg = <0x500c0000 0x2000>, <0x503c0100 0x8>,
 > +		      <0x506c0000 0x400>;
@@ -67,7 +67,7 @@ Acked-by: Rob Herring <robh@kernel.org>
 > +		next-level-cache = <&l3>;
 > +	};
 > +
-> +	l3: l3-cache at 500c8000 {
+> +	l3: l3-cache@500c8000 {
 > +		compatible = "socionext,uniphier-system-cache";
 > +		reg = <0x500c8000 0x2000>, <0x503c8100 0x8>,
 > +		      <0x506c8000 0x400>;
@@ -82,7 +82,7 @@ Acked-by: Rob Herring <robh@kernel.org>
 > --- a/MAINTAINERS
 > +++ b/MAINTAINERS
 > @@ -1600,7 +1600,9 @@ M:	Masahiro Yamada <yamada.masahiro@socionext.com>
->  L:	linux-arm-kernel at lists.infradead.org (moderated for non-subscribers)
+>  L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
 >  S:	Maintained
 >  F:	arch/arm/boot/dts/uniphier*
 > +F:	arch/arm/include/asm/hardware/cache-uniphier.h
diff --git a/a/content_digest b/N2/content_digest
index 5012a4b..affb539 100644
--- a/a/content_digest
+++ b/N2/content_digest
@@ -1,9 +1,38 @@
  "ref\01442551054-2116-1-git-send-email-yamada.masahiro@socionext.com\0"
  "ref\01442551054-2116-2-git-send-email-yamada.masahiro@socionext.com\0"
- "From\0robh@kernel.org (Rob Herring)\0"
- "Subject\0[PATCH v3 1/3] ARM: uniphier: add outer cache support\0"
+ "From\0Rob Herring <robh@kernel.org>\0"
+ "Subject\0Re: [PATCH v3 1/3] ARM: uniphier: add outer cache support\0"
  "Date\0Mon, 21 Sep 2015 09:06:32 -0500\0"
- "To\0linux-arm-kernel@lists.infradead.org\0"
+ "To\0Masahiro Yamada <yamada.masahiro@socionext.com>\0"
+ "Cc\0linux-arm-kernel@lists.infradead.org"
+  arm@kernel.org
+  Arnd Bergmann <arnd@arndb.de>
+  Jiri Slaby <jslaby@suse.com>
+  Linus Walleij <linus.walleij@linaro.org>
+  Kumar Gala <galak@codeaurora.org>
+  Jungseung Lee <js07.lee@gmail.com>
+  Ian Campbell <ijc+devicetree@hellion.org.uk>
+  Rob Herring <robh+dt@kernel.org>
+  Stefan Agner <stefan@agner.ch>
+  Pawel Moll <pawel.moll@arm.com>
+  Maxime Coquelin <mcoquelin.stm32@gmail.com>
+  Andrew Morton <akpm@linux-foundation.org>
+  Tomasz Figa <t.figa@samsung.com>
+  devicetree@vger.kernel.org
+  Jiang Liu <jiang.liu@linux.intel.com>
+  Mauro Carvalho Chehab <mchehab@osg.samsung.com>
+  Russell King <linux@arm.linux.org.uk>
+  Nicolas Pitre <nico@linaro.org>
+  Marek Szyprowski <m.szyprowski@samsung.com>
+  Nathan Lynch <nathan_lynch@mentor.com>
+  Kees Cook <keescook@chromium.org>
+  Paul Bolle <pebolle@tiscali.nl>
+  Greg KH <gregkh@linuxfoundation.org>
+  linux-kernel@vger.kernel.org
+  David S. Miller <davem@davemloft.net>
+  Joe Perches <joe@perches.com>
+  Tony Lindgren <tony@atomide.com>
+ " Mark Rutland <mark.rutland@arm.com>\0"
  "\00:1\0"
  "b\0"
  "On 09/17/2015 11:37 PM, Masahiro Yamada wrote:\n"
@@ -63,7 +92,7 @@
  "> +indicated correctly with \"next-level-cache\" properties.\n"
  "> +\n"
  "> +Example:\n"
- "> +\tl2: l2-cache at 500c0000 {\n"
+ "> +\tl2: l2-cache@500c0000 {\n"
  "> +\t\tcompatible = \"socionext,uniphier-system-cache\";\n"
  "> +\t\treg = <0x500c0000 0x2000>, <0x503c0100 0x8>,\n"
  "> +\t\t      <0x506c0000 0x400>;\n"
@@ -75,7 +104,7 @@
  "> +\t\tnext-level-cache = <&l3>;\n"
  "> +\t};\n"
  "> +\n"
- "> +\tl3: l3-cache at 500c8000 {\n"
+ "> +\tl3: l3-cache@500c8000 {\n"
  "> +\t\tcompatible = \"socionext,uniphier-system-cache\";\n"
  "> +\t\treg = <0x500c8000 0x2000>, <0x503c8100 0x8>,\n"
  "> +\t\t      <0x506c8000 0x400>;\n"
@@ -90,7 +119,7 @@
  "> --- a/MAINTAINERS\n"
  "> +++ b/MAINTAINERS\n"
  "> @@ -1600,7 +1600,9 @@ M:\tMasahiro Yamada <yamada.masahiro@socionext.com>\n"
- ">  L:\tlinux-arm-kernel at lists.infradead.org (moderated for non-subscribers)\n"
+ ">  L:\tlinux-arm-kernel@lists.infradead.org (moderated for non-subscribers)\n"
  ">  S:\tMaintained\n"
  ">  F:\tarch/arm/boot/dts/uniphier*\n"
  "> +F:\tarch/arm/include/asm/hardware/cache-uniphier.h\n"
@@ -754,4 +783,4 @@
  "> +}\n"
  >
 
-3b16918ca5cacd85689c918b07e96faf5c93732e69972574d50ce25b4291b453
+2f68af7b3d6f0e709164b5cbc0261c1899fda666a6580a5485f58c63983d368d

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