diff for duplicates of <56035D80.9080308@rock-chips.com>

diff --git a/a/1.txt b/N1/1.txt
index 16d3dac..a9e23a6 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,4 +1,4 @@
-On 2015年09月17日 17:18, Heiko Stübner wrote:
+On 2015?09?17? 17:18, Heiko St?bner wrote:
 > Am Donnerstag, 17. September 2015, 16:28:52 schrieb Xing Zheng:
 >> Initial release for rk3036, node definitions rk3036 sdk board.
 >>
@@ -103,7 +103,7 @@ Done.
 >> +&i2c1 {
 >> +	status = "okay";
 >> +
->> +        hym8563: hym8563@51 {
+>> +        hym8563: hym8563 at 51 {
 >> +		compatible = "haoyu,hym8563";
 >> +		reg =<0x51>;
 >> +		#clock-cells =<0>;
@@ -168,9 +168,9 @@ Done.
 >> +#include "skeleton.dtsi"
 > in general, please sort nodes by register address, so for example
 >
-> 	interrupt-controller@10139000
+> 	interrupt-controller at 10139000
 > should be before
-> 	clock-controller@20000000
+> 	clock-controller at 20000000
 >
 > same for all other nodes
 Done.
@@ -216,7 +216,7 @@ Done.
 > accepted
 Done, removed it on this patch.
 >> +
->> +		cpu0: cpu@f00 {
+>> +		cpu0: cpu at f00 {
 >> +			device_type = "cpu";
 >> +			compatible = "arm,cortex-a7";
 >> +			reg =<0xf00>;
@@ -232,7 +232,7 @@ Done, removed it.
 >> +			clocks =<&cru ARMCLK>;
 >> +			resets =<&cru SRST_CORE0>;
 >> +		};
->> +		cpu1: cpu@f01 {
+>> +		cpu1: cpu at f01 {
 >> +			device_type = "cpu";
 >> +			compatible = "arm,cortex-a7";
 >> +			reg =<0xf01>;
@@ -246,7 +246,7 @@ Done, removed it.
 >> +		#size-cells =<1>;
 >> +		ranges;
 >> +
->> +                pdma: pdma@20078000 {
+>> +                pdma: pdma at 20078000 {
 >> +                        compatible = "arm,pl330", "arm,primecell";
 >> +                        reg =<0x20078000 0x4000>;
 >> +                        interrupts =<GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
@@ -278,7 +278,7 @@ Done.
 >> +		clock-frequency =<24000000>;
 >> +	};
 >> +
->> +	cru: clock-controller@20000000 {
+>> +	cru: clock-controller at 20000000 {
 >> +		compatible = "rockchip,rk3036-cru";
 >> +		reg =<0x20000000 0x1000>;
 >> +		rockchip,grf =<&grf>;
@@ -288,7 +288,7 @@ Done.
 >> +		assigned-clock-rates =<594000000>;
 >> +	};
 >> +
->> +	uart0: serial@20060000 {
+>> +	uart0: serial at 20060000 {
 >> +		compatible = "rockchip,rk3036-uart", "snps,dw-apb-uart";
 >> +		reg =<0x20060000 0x100>;
 >> +		interrupts =<GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
@@ -309,7 +309,7 @@ Done.
 Done.
 >> +	};
 >> +
->> +	uart1: serial@20064000 {
+>> +	uart1: serial at 20064000 {
 >> +		compatible = "rockchip,rk3036-uart", "snps,dw-apb-uart";
 >> +		reg =<0x20064000 0x100>;
 >> +		interrupts =<GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
@@ -322,7 +322,7 @@ Done.
 >> +		pinctrl-0 =<&uart1_xfer>;
 >> +	};
 >> +
->> +	uart2: serial@20068000 {
+>> +	uart2: serial at 20068000 {
 >> +		compatible = "rockchip,rk3036-uart", "snps,dw-apb-uart";
 >> +		reg =<0x20068000 0x100>;
 >> +		interrupts =<GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
@@ -335,7 +335,7 @@ Done.
 >> +		pinctrl-0 =<&uart2_xfer>;
 >> +	};
 >> +
->> +	pwm0: pwm@20050000 {
+>> +	pwm0: pwm at 20050000 {
 >> +		compatible = "rockchip,rk2928-pwm";
 > 		compatible = "rockchip,rk3036-pwm", "rockchip,rk2928-pwm";
 >
@@ -351,7 +351,7 @@ Done.
 >> +		status = "disabled";
 >> +	};
 >> +
->> +	pwm1: pwm@20050010 {
+>> +	pwm1: pwm at 20050010 {
 >> +		compatible = "rockchip,rk2928-pwm";
 >> +		reg =<0x20050010 0x10>;
 >> +		#pwm-cells =<3>;
@@ -362,7 +362,7 @@ Done.
 >> +		status = "disabled";
 >> +	};
 >> +
->> +	pwm2: pwm@20050020 {
+>> +	pwm2: pwm at 20050020 {
 >> +		compatible = "rockchip,rk2928-pwm";
 >> +		reg =<0x20050020 0x10>;
 >> +		#pwm-cells =<3>;
@@ -373,7 +373,7 @@ Done.
 >> +		status = "disabled";
 >> +	};
 >> +
->> +	pwm3: pwm@20050030 {
+>> +	pwm3: pwm at 20050030 {
 >> +		compatible = "rockchip,rk2928-pwm";
 >> +		reg =<0x20050030 0x10>;
 >> +		#pwm-cells =<2>;
@@ -384,12 +384,12 @@ Done.
 >> +		status = "disabled";
 >> +	};
 >> +
->> +	sram: sram@10080000 {
+>> +	sram: sram at 10080000 {
 >> +		compatible = "rockchip,rk3036-smp-sram", "mmio-sram";
 >> +		reg =<0x10080000 0x2000>;
 >> +	};
 >> +
->> +	gic: interrupt-controller@10139000 {
+>> +	gic: interrupt-controller at 10139000 {
 >> +		compatible = "arm,gic-400";
 >> +		interrupt-controller;
 >> +		#interrupt-cells =<3>;
@@ -402,7 +402,7 @@ Done.
 >> +		interrupts =<GIC_PPI 9 0xf04>;
 >> +	};
 >> +
->> +	grf: syscon@20008000 {
+>> +	grf: syscon at 20008000 {
 >> +		compatible = "rockchip,rk3036-grf", "syscon";
 >> +		reg =<0x20008000 0x1000>;
 >> +	};
@@ -414,7 +414,7 @@ Done.
 >> +		#size-cells =<1>;
 >> +		ranges;
 >> +
->> +		gpio0: gpio0@2007c000 {
+>> +		gpio0: gpio0 at 2007c000 {
 >> +			compatible = "rockchip,gpio-bank";
 >> +			reg =<0x2007c000 0x100>;
 >> +			interrupts =<GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
@@ -427,7 +427,7 @@ Done.
 >> +			#interrupt-cells =<2>;
 >> +		};
 >> +
->> +		gpio1: gpio1@20080000 {
+>> +		gpio1: gpio1 at 20080000 {
 >> +			compatible = "rockchip,gpio-bank";
 >> +			reg =<0x20080000 0x100>;
 >> +			interrupts =<GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
@@ -440,7 +440,7 @@ Done.
 >> +			#interrupt-cells =<2>;
 >> +		};
 >> +
->> +		gpio2: gpio2@20084000 {
+>> +		gpio2: gpio2 at 20084000 {
 >> +			compatible = "rockchip,gpio-bank";
 >> +			reg =<0x20084000 0x100>;
 >> +			interrupts =<GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
@@ -537,7 +537,7 @@ Sorry, done.
 >> +		};
 >> +	};
 >> +
->> +	i2c1: i2c@20056000 {
+>> +	i2c1: i2c at 20056000 {
 >> +		compatible = "rockchip,rk3288-i2c";
 >> +		reg =<0x20056000 0x1000>;
 >> +		interrupts =<GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
@@ -552,10 +552,3 @@ Sorry, done.
 >> +};
 >
 Thanks.
-
-
-
-_______________________________________________
-Linux-rockchip mailing list
-Linux-rockchip@lists.infradead.org
-http://lists.infradead.org/mailman/listinfo/linux-rockchip
diff --git a/a/content_digest b/N1/content_digest
index 2eeec47..73cca45 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,23 +1,13 @@
  "ref\01442478540-15068-1-git-send-email-zhengxing@rock-chips.com\0"
  "ref\01442478540-15068-2-git-send-email-zhengxing@rock-chips.com\0"
  "ref\03497055.MjziMiDfL7@diego\0"
- "From\0Xing Zheng <zhengxing-TNX95d0MmH7DzftRWevZcw@public.gmane.org>\0"
- "Subject\0Re: [PATCH v2 1/9] ARM: dts: rockchip: add core rk3036 dts\0"
+ "From\0zhengxing@rock-chips.com (Xing Zheng)\0"
+ "Subject\0[PATCH v2 1/9] ARM: dts: rockchip: add core rk3036 dts\0"
  "Date\0Thu, 24 Sep 2015 10:18:40 +0800\0"
- "To\0Heiko St\303\274bner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>\0"
- "Cc\0Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>"
-  devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
-  Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org>
-  Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org>
-  Ian Campbell <ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org>
-  linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
-  linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
-  Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
-  Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
- " linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org\0"
+ "To\0linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
- "On 2015\345\271\26409\346\234\21017\346\227\245 17:18, Heiko St\303\274bner wrote:\n"
+ "On 2015?09?17? 17:18, Heiko St?bner wrote:\n"
  "> Am Donnerstag, 17. September 2015, 16:28:52 schrieb Xing Zheng:\n"
  ">> Initial release for rk3036, node definitions rk3036 sdk board.\n"
  ">>\n"
@@ -122,7 +112,7 @@
  ">> +&i2c1 {\n"
  ">> +\tstatus = \"okay\";\n"
  ">> +\n"
- ">> +        hym8563: hym8563@51 {\n"
+ ">> +        hym8563: hym8563 at 51 {\n"
  ">> +\t\tcompatible = \"haoyu,hym8563\";\n"
  ">> +\t\treg =<0x51>;\n"
  ">> +\t\t#clock-cells =<0>;\n"
@@ -187,9 +177,9 @@
  ">> +#include \"skeleton.dtsi\"\n"
  "> in general, please sort nodes by register address, so for example\n"
  ">\n"
- "> \tinterrupt-controller@10139000\n"
+ "> \tinterrupt-controller at 10139000\n"
  "> should be before\n"
- "> \tclock-controller@20000000\n"
+ "> \tclock-controller at 20000000\n"
  ">\n"
  "> same for all other nodes\n"
  "Done.\n"
@@ -235,7 +225,7 @@
  "> accepted\n"
  "Done, removed it on this patch.\n"
  ">> +\n"
- ">> +\t\tcpu0: cpu@f00 {\n"
+ ">> +\t\tcpu0: cpu at f00 {\n"
  ">> +\t\t\tdevice_type = \"cpu\";\n"
  ">> +\t\t\tcompatible = \"arm,cortex-a7\";\n"
  ">> +\t\t\treg =<0xf00>;\n"
@@ -251,7 +241,7 @@
  ">> +\t\t\tclocks =<&cru ARMCLK>;\n"
  ">> +\t\t\tresets =<&cru SRST_CORE0>;\n"
  ">> +\t\t};\n"
- ">> +\t\tcpu1: cpu@f01 {\n"
+ ">> +\t\tcpu1: cpu at f01 {\n"
  ">> +\t\t\tdevice_type = \"cpu\";\n"
  ">> +\t\t\tcompatible = \"arm,cortex-a7\";\n"
  ">> +\t\t\treg =<0xf01>;\n"
@@ -265,7 +255,7 @@
  ">> +\t\t#size-cells =<1>;\n"
  ">> +\t\tranges;\n"
  ">> +\n"
- ">> +                pdma: pdma@20078000 {\n"
+ ">> +                pdma: pdma at 20078000 {\n"
  ">> +                        compatible = \"arm,pl330\", \"arm,primecell\";\n"
  ">> +                        reg =<0x20078000 0x4000>;\n"
  ">> +                        interrupts =<GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,\n"
@@ -297,7 +287,7 @@
  ">> +\t\tclock-frequency =<24000000>;\n"
  ">> +\t};\n"
  ">> +\n"
- ">> +\tcru: clock-controller@20000000 {\n"
+ ">> +\tcru: clock-controller at 20000000 {\n"
  ">> +\t\tcompatible = \"rockchip,rk3036-cru\";\n"
  ">> +\t\treg =<0x20000000 0x1000>;\n"
  ">> +\t\trockchip,grf =<&grf>;\n"
@@ -307,7 +297,7 @@
  ">> +\t\tassigned-clock-rates =<594000000>;\n"
  ">> +\t};\n"
  ">> +\n"
- ">> +\tuart0: serial@20060000 {\n"
+ ">> +\tuart0: serial at 20060000 {\n"
  ">> +\t\tcompatible = \"rockchip,rk3036-uart\", \"snps,dw-apb-uart\";\n"
  ">> +\t\treg =<0x20060000 0x100>;\n"
  ">> +\t\tinterrupts =<GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;\n"
@@ -328,7 +318,7 @@
  "Done.\n"
  ">> +\t};\n"
  ">> +\n"
- ">> +\tuart1: serial@20064000 {\n"
+ ">> +\tuart1: serial at 20064000 {\n"
  ">> +\t\tcompatible = \"rockchip,rk3036-uart\", \"snps,dw-apb-uart\";\n"
  ">> +\t\treg =<0x20064000 0x100>;\n"
  ">> +\t\tinterrupts =<GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;\n"
@@ -341,7 +331,7 @@
  ">> +\t\tpinctrl-0 =<&uart1_xfer>;\n"
  ">> +\t};\n"
  ">> +\n"
- ">> +\tuart2: serial@20068000 {\n"
+ ">> +\tuart2: serial at 20068000 {\n"
  ">> +\t\tcompatible = \"rockchip,rk3036-uart\", \"snps,dw-apb-uart\";\n"
  ">> +\t\treg =<0x20068000 0x100>;\n"
  ">> +\t\tinterrupts =<GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;\n"
@@ -354,7 +344,7 @@
  ">> +\t\tpinctrl-0 =<&uart2_xfer>;\n"
  ">> +\t};\n"
  ">> +\n"
- ">> +\tpwm0: pwm@20050000 {\n"
+ ">> +\tpwm0: pwm at 20050000 {\n"
  ">> +\t\tcompatible = \"rockchip,rk2928-pwm\";\n"
  "> \t\tcompatible = \"rockchip,rk3036-pwm\", \"rockchip,rk2928-pwm\";\n"
  ">\n"
@@ -370,7 +360,7 @@
  ">> +\t\tstatus = \"disabled\";\n"
  ">> +\t};\n"
  ">> +\n"
- ">> +\tpwm1: pwm@20050010 {\n"
+ ">> +\tpwm1: pwm at 20050010 {\n"
  ">> +\t\tcompatible = \"rockchip,rk2928-pwm\";\n"
  ">> +\t\treg =<0x20050010 0x10>;\n"
  ">> +\t\t#pwm-cells =<3>;\n"
@@ -381,7 +371,7 @@
  ">> +\t\tstatus = \"disabled\";\n"
  ">> +\t};\n"
  ">> +\n"
- ">> +\tpwm2: pwm@20050020 {\n"
+ ">> +\tpwm2: pwm at 20050020 {\n"
  ">> +\t\tcompatible = \"rockchip,rk2928-pwm\";\n"
  ">> +\t\treg =<0x20050020 0x10>;\n"
  ">> +\t\t#pwm-cells =<3>;\n"
@@ -392,7 +382,7 @@
  ">> +\t\tstatus = \"disabled\";\n"
  ">> +\t};\n"
  ">> +\n"
- ">> +\tpwm3: pwm@20050030 {\n"
+ ">> +\tpwm3: pwm at 20050030 {\n"
  ">> +\t\tcompatible = \"rockchip,rk2928-pwm\";\n"
  ">> +\t\treg =<0x20050030 0x10>;\n"
  ">> +\t\t#pwm-cells =<2>;\n"
@@ -403,12 +393,12 @@
  ">> +\t\tstatus = \"disabled\";\n"
  ">> +\t};\n"
  ">> +\n"
- ">> +\tsram: sram@10080000 {\n"
+ ">> +\tsram: sram at 10080000 {\n"
  ">> +\t\tcompatible = \"rockchip,rk3036-smp-sram\", \"mmio-sram\";\n"
  ">> +\t\treg =<0x10080000 0x2000>;\n"
  ">> +\t};\n"
  ">> +\n"
- ">> +\tgic: interrupt-controller@10139000 {\n"
+ ">> +\tgic: interrupt-controller at 10139000 {\n"
  ">> +\t\tcompatible = \"arm,gic-400\";\n"
  ">> +\t\tinterrupt-controller;\n"
  ">> +\t\t#interrupt-cells =<3>;\n"
@@ -421,7 +411,7 @@
  ">> +\t\tinterrupts =<GIC_PPI 9 0xf04>;\n"
  ">> +\t};\n"
  ">> +\n"
- ">> +\tgrf: syscon@20008000 {\n"
+ ">> +\tgrf: syscon at 20008000 {\n"
  ">> +\t\tcompatible = \"rockchip,rk3036-grf\", \"syscon\";\n"
  ">> +\t\treg =<0x20008000 0x1000>;\n"
  ">> +\t};\n"
@@ -433,7 +423,7 @@
  ">> +\t\t#size-cells =<1>;\n"
  ">> +\t\tranges;\n"
  ">> +\n"
- ">> +\t\tgpio0: gpio0@2007c000 {\n"
+ ">> +\t\tgpio0: gpio0 at 2007c000 {\n"
  ">> +\t\t\tcompatible = \"rockchip,gpio-bank\";\n"
  ">> +\t\t\treg =<0x2007c000 0x100>;\n"
  ">> +\t\t\tinterrupts =<GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;\n"
@@ -446,7 +436,7 @@
  ">> +\t\t\t#interrupt-cells =<2>;\n"
  ">> +\t\t};\n"
  ">> +\n"
- ">> +\t\tgpio1: gpio1@20080000 {\n"
+ ">> +\t\tgpio1: gpio1 at 20080000 {\n"
  ">> +\t\t\tcompatible = \"rockchip,gpio-bank\";\n"
  ">> +\t\t\treg =<0x20080000 0x100>;\n"
  ">> +\t\t\tinterrupts =<GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;\n"
@@ -459,7 +449,7 @@
  ">> +\t\t\t#interrupt-cells =<2>;\n"
  ">> +\t\t};\n"
  ">> +\n"
- ">> +\t\tgpio2: gpio2@20084000 {\n"
+ ">> +\t\tgpio2: gpio2 at 20084000 {\n"
  ">> +\t\t\tcompatible = \"rockchip,gpio-bank\";\n"
  ">> +\t\t\treg =<0x20084000 0x100>;\n"
  ">> +\t\t\tinterrupts =<GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;\n"
@@ -556,7 +546,7 @@
  ">> +\t\t};\n"
  ">> +\t};\n"
  ">> +\n"
- ">> +\ti2c1: i2c@20056000 {\n"
+ ">> +\ti2c1: i2c at 20056000 {\n"
  ">> +\t\tcompatible = \"rockchip,rk3288-i2c\";\n"
  ">> +\t\treg =<0x20056000 0x1000>;\n"
  ">> +\t\tinterrupts =<GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;\n"
@@ -570,13 +560,6 @@
  ">> +\t};\n"
  ">> +};\n"
  ">\n"
- "Thanks.\n"
- "\n"
- "\n"
- "\n"
- "_______________________________________________\n"
- "Linux-rockchip mailing list\n"
- "Linux-rockchip@lists.infradead.org\n"
- http://lists.infradead.org/mailman/listinfo/linux-rockchip
+ Thanks.
 
-085da596c907871f950765bad06c10799d644eacecae760e48eadb84d319b762
+0ea0e033f5cb72c1e56a70e6379a295f0c103f02a3dbe4cb0c295c6375fc7abe
