From mboxrd@z Thu Jan 1 00:00:00 1970 From: sugar Subject: Re: [PATCH 1/2] ASoC: rockchip: i2s: add 8 channels capture and lrck-mode support Date: Mon, 28 Sep 2015 16:16:12 +0800 Message-ID: <5608F74C.3000104@rock-chips.com> References: <1442979683-9441-1-git-send-email-sugar.zhang@rock-chips.com> <1442979683-9441-2-git-send-email-sugar.zhang@rock-chips.com> <20150923162433.GQ30445@sirena.org.uk> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8"; Format="flowed" Content-Transfer-Encoding: base64 Return-path: Received: from regular1.263xmail.com (regular1.263xmail.com [211.150.99.140]) by alsa0.perex.cz (Postfix) with ESMTP id 957132604D3 for ; Mon, 28 Sep 2015 10:16:21 +0200 (CEST) In-Reply-To: <20150923162433.GQ30445@sirena.org.uk> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org To: Mark Brown Cc: alsa-devel@alsa-project.org, heiko@sntech.de, linux-kernel@vger.kernel.org, tiwai@suse.com, lgirdwood@gmail.com, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org List-Id: alsa-devel@alsa-project.org SGkgTWFyayBCcm93biwKCuWcqCA5LzI0LzIwMTUgMDA6MjQsIE1hcmsgQnJvd24g5YaZ6YGTOgo+ IE9uIFdlZCwgU2VwIDIzLCAyMDE1IGF0IDExOjQxOjIyQU0gKzA4MDAsIFN1Z2FyIFpoYW5nIHdy b3RlOgo+Cj4+ICsJLyogY29uZmlndXJlIHR4L3J4IGxyY2sgdXNlIG1vZGUgKi8KPj4gKwlpZiAo IW9mX3Byb3BlcnR5X3JlYWRfdTMyKG5vZGUsICJyb2NrY2hpcCxscmNrLW1vZGUiLCAmdmFsKSkg ewo+PiArCQlpZiAodmFsID49IExSQ0tfVFhSWCAmJiB2YWwgPD0gTFJDS19SWF9TSEFSRSkKPj4g KwkJCXJlZ21hcF91cGRhdGVfYml0cyhpMnMtPnJlZ21hcCwgSTJTX0NLUiwKPj4gKwkJCQkJICAg STJTX0NLUl9UUkNNX01BU0ssCj4+ICsJCQkJCSAgIEkyU19DS1JfVFJDTSh2YWwpKTsKPj4gKwl9 Cj4KPiBUaGlzIGxvb2tzIGxpa2UgaXQncyBmb3IgYSBib2FyZCBjb25maWd1cmF0aW9uIHRoaW5n IHNvIEknZCBub3QgcmVhbGx5Cj4gZXhwZWN0IHRoaXMgdG8gYmUgaGFuZGxlZCBpbiBhIGRldmlj ZSBzcGVjaWZpYyBwcm9wZXJ0eSAtIGl0J3MgZmFpcmx5Cj4gY29tbW9uIHRvIGhhdmUgdGhpcyBz aXR1YXRpb24gYW5kIHdlIGFscmVhZHkgaGF2ZSB0aGUgc3ltbWV0cmljX3JhdGVzCj4gZmxhZyBm b3IgdGhlIERBSSB0byBoYW5kbGUgaXQgKGFuZCBpZiB3ZSBkbyBlbmQgdXAgYWRkaW5nIHRoaXMg cHJvcGVydHkKPiB3ZSdkIG5lZWQgdGhlIGRyaXZlciB0byBzZXQgdGhhdCBmbGFnIHNvIHRoYXQg dGhlIGNvcmUgY2FuIGhhbmRsZSB0aGluZ3MKPiBwcm9wZXJseSBhbmQgbWFrZSBzdXJlIHRoYXQg dXNlcnNwYWNlIGRvZXNuJ3QgdHJ5IHRvIHNldCBkaWZmZXJlbnQgcmF0ZXMKPiBpbiBkaWZmZXJl bnQgZGlyZWN0aW9ucykuCj4KPiBNeSBpbml0aWFsIHRob3VnaHQgaGVyZSBpcyB0aGF0IHRoZSBt YWNoaW5lIGRyaXZlciBzaG91bGQgYmUgcmVzcG9uc2libGUKPiBmb3Igc2V0dGluZyB0aGlzIGFu ZCB0aGVuIHRoZSBEQUkgZHJpdmVyIHNob3VsZCBjaGVjayB0byBzZWUgaWYKPiBzeW1tZXRyaWNf cmF0ZXMgYXJlIGluIHVzZSBhbmQgY29uZmlndXJlIGl0c2VsZiBhcHByb3ByaWF0ZWx5LiAgSXMg dGhlcmUKPiBhIHJlYXNvbiB3aHkgdGhpcyB3b24ndCB3b3JrIGhlcmU/Cj4KCkl0J3MgZm9yIGky cyBpcCBjb25maWd1cmF0aW9uLCBpbiB0aGUgbW9zdCBzaXR1YXRpb24sIHRoZXJlIGlzIG5vIG5l ZWQKdG8gdXNlIHRoaXMgcHJvcGVydHksIGV4Y2VwdCBvbmUgY2FzZToKCkluIG9yZGVyIHRvIHNh dmUgZ3BpbyBwaW5zIGZvciBvdGhlciBmdW5jdGlvbiB1c2UsIHdlIG1heSB1c2Ugc2luZ2xlCmxy Y2sodHggb3IgcngpIHBpbi4gb2YgY291cnNlLCBpdCBkZXBlbmRzIG9uIHByb2R1Y3QgZGVzaWdu LiB3aGVuIGluIGkycwpzbGF2ZSBtb2RlLCB3ZSBuZWVkIHRvIGNvbmZpZ3VyZSB0aGlzIHRvIHNo YXJlIGxyY2sgd2l0aCB0eC9yeCBpbnNpZGUgCmkycyBsb2dpYy4KCnN5bW1ldHJpY19yYXRlcyBm bGFnIHdvcmtzIGZpbmUgb24gcm9ja2NoaXAgcGxhdGZvcm0sIGJ1dCBpdCBjYW4ndCBjb3ZlciAK dGhlIGFib3ZlIGNhc2UuCgpEbyB5b3UgaGF2ZSBhbnkgc3VnZ2VzdGlvbiBhYm91dCB0aGlzIG9y IG1heWJlIHRoZXJlIGlzIG5vIG5lZWQgdG8gCnVwc3RyZWFtIHRoaXMgc3BlY2lhbCBwYXJ0PwoK QmVzdCBSZWdhcmRzClN1Z2FyCgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fXwpBbHNhLWRldmVsIG1haWxpbmcgbGlzdApBbHNhLWRldmVsQGFsc2EtcHJvamVj dC5vcmcKaHR0cDovL21haWxtYW4uYWxzYS1wcm9qZWN0Lm9yZy9tYWlsbWFuL2xpc3RpbmZvL2Fs c2EtZGV2ZWwK From mboxrd@z Thu Jan 1 00:00:00 1970 From: sugar.zhang@rock-chips.com (sugar) Date: Mon, 28 Sep 2015 16:16:12 +0800 Subject: [PATCH 1/2] ASoC: rockchip: i2s: add 8 channels capture and lrck-mode support In-Reply-To: <20150923162433.GQ30445@sirena.org.uk> References: <1442979683-9441-1-git-send-email-sugar.zhang@rock-chips.com> <1442979683-9441-2-git-send-email-sugar.zhang@rock-chips.com> <20150923162433.GQ30445@sirena.org.uk> Message-ID: <5608F74C.3000104@rock-chips.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hi Mark Brown, ? 9/24/2015 00:24, Mark Brown ??: > On Wed, Sep 23, 2015 at 11:41:22AM +0800, Sugar Zhang wrote: > >> + /* configure tx/rx lrck use mode */ >> + if (!of_property_read_u32(node, "rockchip,lrck-mode", &val)) { >> + if (val >= LRCK_TXRX && val <= LRCK_RX_SHARE) >> + regmap_update_bits(i2s->regmap, I2S_CKR, >> + I2S_CKR_TRCM_MASK, >> + I2S_CKR_TRCM(val)); >> + } > > This looks like it's for a board configuration thing so I'd not really > expect this to be handled in a device specific property - it's fairly > common to have this situation and we already have the symmetric_rates > flag for the DAI to handle it (and if we do end up adding this property > we'd need the driver to set that flag so that the core can handle things > properly and make sure that userspace doesn't try to set different rates > in different directions). > > My initial thought here is that the machine driver should be responsible > for setting this and then the DAI driver should check to see if > symmetric_rates are in use and configure itself appropriately. Is there > a reason why this won't work here? > It's for i2s ip configuration, in the most situation, there is no need to use this property, except one case: In order to save gpio pins for other function use, we may use single lrck(tx or rx) pin. of course, it depends on product design. when in i2s slave mode, we need to configure this to share lrck with tx/rx inside i2s logic. symmetric_rates flag works fine on rockchip platform, but it can't cover the above case. Do you have any suggestion about this or maybe there is no need to upstream this special part? Best Regards Sugar From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932129AbbI1IQ3 (ORCPT ); Mon, 28 Sep 2015 04:16:29 -0400 Received: from regular2.263xmail.com ([211.157.152.4]:46507 "EHLO regular2.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757036AbbI1IQ1 (ORCPT ); Mon, 28 Sep 2015 04:16:27 -0400 X-263anti-spam: KSV:0;BIG:0;ABS:1;DNS:0;ATT:0;SPF:S; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 1 X-SKE-CHECKED: 1 X-ADDR-CHECKED: 0 X-RL-SENDER: sugar.zhang@rock-chips.com X-FST-TO: linux-kernel@vger.kernel.org X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: sugar.zhang@rock-chips.com X-UNIQUE-TAG: <7d14d4660662208dec9ee8dc105b8404> X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 Subject: Re: [PATCH 1/2] ASoC: rockchip: i2s: add 8 channels capture and lrck-mode support To: Mark Brown References: <1442979683-9441-1-git-send-email-sugar.zhang@rock-chips.com> <1442979683-9441-2-git-send-email-sugar.zhang@rock-chips.com> <20150923162433.GQ30445@sirena.org.uk> Cc: lgirdwood@gmail.com, perex@perex.cz, tiwai@suse.com, heiko@sntech.de, alsa-devel@alsa-project.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org From: sugar Message-ID: <5608F74C.3000104@rock-chips.com> Date: Mon, 28 Sep 2015 16:16:12 +0800 User-Agent: Mozilla/5.0 (Windows NT 6.1; rv:38.0) Gecko/20100101 Thunderbird/38.2.0 MIME-Version: 1.0 In-Reply-To: <20150923162433.GQ30445@sirena.org.uk> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Mark Brown, 在 9/24/2015 00:24, Mark Brown 写道: > On Wed, Sep 23, 2015 at 11:41:22AM +0800, Sugar Zhang wrote: > >> + /* configure tx/rx lrck use mode */ >> + if (!of_property_read_u32(node, "rockchip,lrck-mode", &val)) { >> + if (val >= LRCK_TXRX && val <= LRCK_RX_SHARE) >> + regmap_update_bits(i2s->regmap, I2S_CKR, >> + I2S_CKR_TRCM_MASK, >> + I2S_CKR_TRCM(val)); >> + } > > This looks like it's for a board configuration thing so I'd not really > expect this to be handled in a device specific property - it's fairly > common to have this situation and we already have the symmetric_rates > flag for the DAI to handle it (and if we do end up adding this property > we'd need the driver to set that flag so that the core can handle things > properly and make sure that userspace doesn't try to set different rates > in different directions). > > My initial thought here is that the machine driver should be responsible > for setting this and then the DAI driver should check to see if > symmetric_rates are in use and configure itself appropriately. Is there > a reason why this won't work here? > It's for i2s ip configuration, in the most situation, there is no need to use this property, except one case: In order to save gpio pins for other function use, we may use single lrck(tx or rx) pin. of course, it depends on product design. when in i2s slave mode, we need to configure this to share lrck with tx/rx inside i2s logic. symmetric_rates flag works fine on rockchip platform, but it can't cover the above case. Do you have any suggestion about this or maybe there is no need to upstream this special part? Best Regards Sugar