From mboxrd@z Thu Jan 1 00:00:00 1970 From: Yakir Yang Subject: Re: [PATCH] drm/rockchip: vop: Correct enabled clocks during setup Date: Tue, 29 Sep 2015 17:55:24 +0800 Message-ID: <560A600C.8060203@rock-chips.com> References: <1443518893-28142-1-git-send-email-sjoerd.simons@collabora.co.uk> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8"; Format="flowed" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <1443518893-28142-1-git-send-email-sjoerd.simons@collabora.co.uk> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Sjoerd Simons , Mark Yao Cc: linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org List-Id: linux-rockchip.vger.kernel.org CgpPbiAwOS8yOS8yMDE1IDA1OjI4IFBNLCBTam9lcmQgU2ltb25zIHdyb3RlOgo+IFdoZW4gZG9p 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linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 09/29/2015 05:28 PM, Sjoerd Simons wrote: > When doing the initial setup both the hclk and the aclk need to be > enabled otherwise the board will simply hang. This only occurs when > building the vop driver as a module, when its built-in the initial setup > happens to run before the clock framework shuts of unused clocks > (including the aclk). > > While there also switch to doing prepare and enable in one step rather > then separate steps to reduce the amount of code required. > > Signed-off-by: Sjoerd Simons Looks good and test on chromeos-3.14 tree, no problem, so Tested-by: Yakir Yang > --- > > drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 36 +++++++++++------------------ > 1 file changed, 14 insertions(+), 22 deletions(-) > > diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c > index 5d8ae5e..48719df 100644 > --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c > +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c > @@ -1575,32 +1575,25 @@ static int vop_initial(struct vop *vop) > return PTR_ERR(vop->dclk); > } > > - ret = clk_prepare(vop->hclk); > - if (ret < 0) { > - dev_err(vop->dev, "failed to prepare hclk\n"); > - return ret; > - } > - > ret = clk_prepare(vop->dclk); > if (ret < 0) { > dev_err(vop->dev, "failed to prepare dclk\n"); > - goto err_unprepare_hclk; > + return ret; > } > > - ret = clk_prepare(vop->aclk); > + /* Enable both the hclk and aclk to setup the vop */ > + ret = clk_prepare_enable(vop->hclk); > if (ret < 0) { > - dev_err(vop->dev, "failed to prepare aclk\n"); > + dev_err(vop->dev, "failed to prepare/enable hclk\n"); > goto err_unprepare_dclk; > } > > - /* > - * enable hclk, so that we can config vop register. > - */ > - ret = clk_enable(vop->hclk); > + ret = clk_prepare_enable(vop->aclk); > if (ret < 0) { > - dev_err(vop->dev, "failed to prepare aclk\n"); > - goto err_unprepare_aclk; > + dev_err(vop->dev, "failed to prepare/enable aclk\n"); > + goto err_disable_hclk; > } > + > /* > * do hclk_reset, reset all vop registers. > */ > @@ -1608,7 +1601,7 @@ static int vop_initial(struct vop *vop) > if (IS_ERR(ahb_rst)) { > dev_err(vop->dev, "failed to get ahb reset\n"); > ret = PTR_ERR(ahb_rst); > - goto err_disable_hclk; > + goto err_disable_aclk; > } > reset_control_assert(ahb_rst); > usleep_range(10, 20); > @@ -1634,26 +1627,25 @@ static int vop_initial(struct vop *vop) > if (IS_ERR(vop->dclk_rst)) { > dev_err(vop->dev, "failed to get dclk reset\n"); > ret = PTR_ERR(vop->dclk_rst); > - goto err_unprepare_aclk; > + goto err_disable_aclk; > } > reset_control_assert(vop->dclk_rst); > usleep_range(10, 20); > reset_control_deassert(vop->dclk_rst); > > clk_disable(vop->hclk); > + clk_disable(vop->aclk); > > vop->is_enabled = false; > > return 0; > > +err_disable_aclk: > + clk_disable_unprepare(vop->aclk); > err_disable_hclk: > - clk_disable(vop->hclk); > -err_unprepare_aclk: > - clk_unprepare(vop->aclk); > + clk_disable_unprepare(vop->hclk); > err_unprepare_dclk: > clk_unprepare(vop->dclk); > -err_unprepare_hclk: > - clk_unprepare(vop->hclk); > return ret; > } > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934346AbbI2J4S (ORCPT ); Tue, 29 Sep 2015 05:56:18 -0400 Received: from lucky1.263xmail.com ([211.157.147.130]:54120 "EHLO lucky1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934277AbbI2J4G (ORCPT ); Tue, 29 Sep 2015 05:56:06 -0400 X-263anti-spam: KSV:0; X-MAIL-GRAY: 1 X-MAIL-DELIVERY: 0 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-ADDR-CHECKED: 0 X-RL-SENDER: ykk@rock-chips.com X-FST-TO: linux-arm-kernel@lists.infradead.org X-SENDER-IP: 172.245.164.78 X-LOGIN-NAME: ykk@rock-chips.com X-UNIQUE-TAG: <941b2c0b2dd0294e127c03978acec6a8> X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 Message-ID: <560A600C.8060203@rock-chips.com> Date: Tue, 29 Sep 2015 17:55:24 +0800 From: Yakir Yang User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.8.0 MIME-Version: 1.0 To: Sjoerd Simons , Mark Yao CC: Heiko Stuebner , David Airlie , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH] drm/rockchip: vop: Correct enabled clocks during setup References: <1443518893-28142-1-git-send-email-sjoerd.simons@collabora.co.uk> In-Reply-To: <1443518893-28142-1-git-send-email-sjoerd.simons@collabora.co.uk> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 09/29/2015 05:28 PM, Sjoerd Simons wrote: > When doing the initial setup both the hclk and the aclk need to be > enabled otherwise the board will simply hang. This only occurs when > building the vop driver as a module, when its built-in the initial setup > happens to run before the clock framework shuts of unused clocks > (including the aclk). > > While there also switch to doing prepare and enable in one step rather > then separate steps to reduce the amount of code required. > > Signed-off-by: Sjoerd Simons Looks good and test on chromeos-3.14 tree, no problem, so Tested-by: Yakir Yang > --- > > drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 36 +++++++++++------------------ > 1 file changed, 14 insertions(+), 22 deletions(-) > > diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c > index 5d8ae5e..48719df 100644 > --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c > +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c > @@ -1575,32 +1575,25 @@ static int vop_initial(struct vop *vop) > return PTR_ERR(vop->dclk); > } > > - ret = clk_prepare(vop->hclk); > - if (ret < 0) { > - dev_err(vop->dev, "failed to prepare hclk\n"); > - return ret; > - } > - > ret = clk_prepare(vop->dclk); > if (ret < 0) { > dev_err(vop->dev, "failed to prepare dclk\n"); > - goto err_unprepare_hclk; > + return ret; > } > > - ret = clk_prepare(vop->aclk); > + /* Enable both the hclk and aclk to setup the vop */ > + ret = clk_prepare_enable(vop->hclk); > if (ret < 0) { > - dev_err(vop->dev, "failed to prepare aclk\n"); > + dev_err(vop->dev, "failed to prepare/enable hclk\n"); > goto err_unprepare_dclk; > } > > - /* > - * enable hclk, so that we can config vop register. > - */ > - ret = clk_enable(vop->hclk); > + ret = clk_prepare_enable(vop->aclk); > if (ret < 0) { > - dev_err(vop->dev, "failed to prepare aclk\n"); > - goto err_unprepare_aclk; > + dev_err(vop->dev, "failed to prepare/enable aclk\n"); > + goto err_disable_hclk; > } > + > /* > * do hclk_reset, reset all vop registers. > */ > @@ -1608,7 +1601,7 @@ static int vop_initial(struct vop *vop) > if (IS_ERR(ahb_rst)) { > dev_err(vop->dev, "failed to get ahb reset\n"); > ret = PTR_ERR(ahb_rst); > - goto err_disable_hclk; > + goto err_disable_aclk; > } > reset_control_assert(ahb_rst); > usleep_range(10, 20); > @@ -1634,26 +1627,25 @@ static int vop_initial(struct vop *vop) > if (IS_ERR(vop->dclk_rst)) { > dev_err(vop->dev, "failed to get dclk reset\n"); > ret = PTR_ERR(vop->dclk_rst); > - goto err_unprepare_aclk; > + goto err_disable_aclk; > } > reset_control_assert(vop->dclk_rst); > usleep_range(10, 20); > reset_control_deassert(vop->dclk_rst); > > clk_disable(vop->hclk); > + clk_disable(vop->aclk); > > vop->is_enabled = false; > > return 0; > > +err_disable_aclk: > + clk_disable_unprepare(vop->aclk); > err_disable_hclk: > - clk_disable(vop->hclk); > -err_unprepare_aclk: > - clk_unprepare(vop->aclk); > + clk_disable_unprepare(vop->hclk); > err_unprepare_dclk: > clk_unprepare(vop->dclk); > -err_unprepare_hclk: > - clk_unprepare(vop->hclk); > return ret; > } >