From mboxrd@z Thu Jan 1 00:00:00 1970 From: =?UTF-8?Q?Roger_Pau_Monn=c3=a9?= Subject: Re: [PATCH v6 24/29] xen/x86: allow HVM guests to use hypercalls to bring up vCPUs Date: Tue, 29 Sep 2015 18:58:00 +0200 Message-ID: <560AC318.1050201@citrix.com> References: <1441368548-43465-1-git-send-email-roger.pau@citrix.com> <1441368548-43465-25-git-send-email-roger.pau@citrix.com> <5600420C02000078000A4234@prv-mh.provo.novell.com> <5609664D.8060604@citrix.com> <560A555402000078000A6625@prv-mh.provo.novell.com> <560A6124.2090404@citrix.com> <560A7EFA02000078000A6846@prv-mh.provo.novell.com> <560A6714.7060303@citrix.com> <560A851202000078000A68AA@prv-mh.provo.novell.com> <560A69DB.9060505@citrix.com> <560A888D02000078000A68DD@prv-mh.provo.novell.com> <560A99C0.5050202@citrix.com> <560ACA7302000078000A6C93@prv-mh.provo.novell.com> <560AB5C6.6080404@citrix.com> <560AD65F02000078000A6CF6@prv-mh.provo.novell.com> <560AC129.1040309@citrix.com> Mime-Version: 1.0 Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mail6.bemta14.messagelabs.com ([193.109.254.103]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1ZgyEA-00057Y-ID for xen-devel@lists.xenproject.org; Tue, 29 Sep 2015 16:58:06 +0000 In-Reply-To: <560AC129.1040309@citrix.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Jan Beulich Cc: Ian Campbell , George Dunlap , Andrew Cooper , Tim Deegan , Stefano Stabellini , xen-devel@lists.xenproject.org List-Id: xen-devel@lists.xenproject.org El 29/09/15 a les 18.49, Roger Pau Monn=E9 ha escrit: > El 29/09/15 a les 18.20, Jan Beulich ha escrit: >> I said before that we should aim at being as >> consistent as possible. (And btw I do not think that tr_base being >> zero makes any sense.) > = > We don't actually have a TSS anywhere, does it really matter if base is = > set to 0? > = > In fact allowing the user to set tr_base and tr_limit is kind of = > pointless, it's impossible to load a TSS from this interface. So AFAICT = > what really matters is tr_ar only. Please ignore the excerpt above, it's wrong. A user can indeed place a valid TSS in memory and load it on the vcpu using this interface. Roger.