From: Vladimir Zapolskiy <vz@mleia.com>
To: David Woodhouse <dwmw2@infradead.org>,
Brian Norris <computersforpeace@gmail.com>,
Roland Stigge <stigge@antcom.de>
Cc: linux-mtd@lists.infradead.org
Subject: Re: [PATCH v2 1/3] mtd: nand: lpc32xx_slc: improve SLCTAC_*() macro definitions
Date: Thu, 01 Oct 2015 08:20:12 +0300 [thread overview]
Message-ID: <560CC28C.2040805@mleia.com> (raw)
In-Reply-To: <1443655417-14689-2-git-send-email-vz@mleia.com>
On 01.10.2015 02:23, Vladimir Zapolskiy wrote:
> No functional change, move bitfield calculations to macro
> definitions with added clock rate argument, which are in turn defined
> by new common SLCTAC_CLOCKS(c, n, s) macro definition.
>
> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
> ---
> Changes from v1 to v2:
> * none, new change
>
> drivers/mtd/nand/lpc32xx_slc.c | 27 +++++++++++++++------------
> 1 file changed, 15 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/mtd/nand/lpc32xx_slc.c b/drivers/mtd/nand/lpc32xx_slc.c
> index abfec13..9ac0f3b 100644
> --- a/drivers/mtd/nand/lpc32xx_slc.c
> +++ b/drivers/mtd/nand/lpc32xx_slc.c
> @@ -94,22 +94,25 @@
> /**********************************************************************
> * slc_tac register definitions
> **********************************************************************/
> +/* Computation of clock cycles on basis of controller and device clock rates */
> +#define SLCTAC_CLOCKS(c, n, s) (((1 + (c / n)) & 0xF) << s)
> +
> /* Clock setting for RDY write sample wait time in 2*n clocks */
> #define SLCTAC_WDR(n) (((n) & 0xF) << 28)
> /* Write pulse width in clock cycles, 1 to 16 clocks */
> -#define SLCTAC_WWIDTH(n) (((n) & 0xF) << 24)
> +#define SLCTAC_WWIDTH(c, n) (SLCTAC_CLOCKS(c, n, 24))
> /* Write hold time of control and data signals, 1 to 16 clocks */
> -#define SLCTAC_WHOLD(n) (((n) & 0xF) << 20)
> +#define SLCTAC_WHOLD(c, n) (SLCTAC_CLOCKS(c, n, 20))
> /* Write setup time of control and data signals, 1 to 16 clocks */
> -#define SLCTAC_WSETUP(n) (((n) & 0xF) << 16)
> +#define SLCTAC_WSETUP(c, n) (SLCTAC_CLOCKS(c, n, 16))
> /* Clock setting for RDY read sample wait time in 2*n clocks */
> #define SLCTAC_RDR(n) (((n) & 0xF) << 12)
> /* Read pulse width in clock cycles, 1 to 16 clocks */
> -#define SLCTAC_RWIDTH(n) (((n) & 0xF) << 8)
> +#define SLCTAC_RWIDTH(c, n) (SLCTAC_CLOCKS(c, n, 8))
> /* Read hold time of control and data signals, 1 to 16 clocks */
> -#define SLCTAC_RHOLD(n) (((n) & 0xF) << 4)
> +#define SLCTAC_RHOLD(c, n) (SLCTAC_CLOCKS(c, n, 4))
> /* Read setup time of control and data signals, 1 to 16 clocks */
> -#define SLCTAC_RSETUP(n) (((n) & 0xF) << 0)
> +#define SLCTAC_RSETUP(c, n) (SLCTAC_CLOCKS(c, n, 0))
>
Anticipating a question about not parenthesized arguments, I don't know,
if more parentheses around arguments in these macro definitions are
needed, because there is no other potential usage of them.
Please let me know, if you think different, I'll fix it.
--
With best wishes,
Vladimir
next prev parent reply other threads:[~2015-10-01 5:20 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-30 23:23 [PATCH v2 0/3] mtd: nand: lpc32xx_slc: fix calculation of timing arcs from given values Vladimir Zapolskiy
2015-09-30 23:23 ` [PATCH v2 1/3] mtd: nand: lpc32xx_slc: improve SLCTAC_*() macro definitions Vladimir Zapolskiy
2015-10-01 5:20 ` Vladimir Zapolskiy [this message]
2015-09-30 23:23 ` [PATCH v2 2/3] mtd: nand: lpc32xx_slc: fix potential overflow over 4 bits Vladimir Zapolskiy
2015-09-30 23:23 ` [PATCH v2 3/3] mtd: nand: lpc32xx_slc: fix calculation of timing arcs from given values Vladimir Zapolskiy
2015-10-04 21:48 ` [PATCH v2 0/3] " Brian Norris
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