From: Stefano Babic <sbabic@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] imx: mx6: correct enable_fec_anatop_clock
Date: Fri, 2 Oct 2015 10:32:14 +0200 [thread overview]
Message-ID: <560E410E.5040008@denx.de> (raw)
In-Reply-To: <1441530947-29576-1-git-send-email-Peng.Fan@freescale.com>
On 06/09/2015 11:15, Peng Fan wrote:
> We should follow 'read->set/clr bit->write' flow for enable_fec_anatop_clock,
> otherwise we may overridden configuration before enable_fec_anatop_clock.
>
> Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
> Cc: Stefano Babic <sbabic@denx.de>
> Cc: Cc: Fabio Estevam <fabio.estevam@freescale.com>
> ---
> arch/arm/cpu/armv7/mx6/clock.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
> index ba6cc75..11efd12 100644
> --- a/arch/arm/cpu/armv7/mx6/clock.c
> +++ b/arch/arm/cpu/armv7/mx6/clock.c
> @@ -535,6 +535,8 @@ int enable_fec_anatop_clock(int fec_id, enum enet_freq freq)
> if (freq < ENET_25MHZ || freq > ENET_125MHZ)
> return -EINVAL;
>
> + reg = readl(&anatop->pll_enet);
> +
> if (fec_id == 0) {
> reg &= ~BM_ANADIG_PLL_ENET_DIV_SELECT;
> reg |= BF_ANADIG_PLL_ENET_DIV_SELECT(freq);
>
Applied to u-boot-imx, thanks!
Best regards,
Stefano Babic
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prev parent reply other threads:[~2015-10-02 8:32 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-06 9:15 [U-Boot] [PATCH] imx: mx6: correct enable_fec_anatop_clock Peng Fan
2015-10-02 8:32 ` Stefano Babic [this message]
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