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From: Paolo Bonzini <pbonzini@redhat.com>
To: Peter Maydell <peter.maydell@linaro.org>,
	Christopher Covington <cov@codeaurora.org>
Cc: Laurent Vivier <lvivier@redhat.com>,
	Peter Crosthwaite <crosthwaitepeter@gmail.com>,
	"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
	Alistair Francis <alistair.francis@xilinx.com>
Subject: Re: [Qemu-devel] [PATCH] target-arm: Use common CPU cycle infrastructure
Date: Mon, 5 Oct 2015 16:09:52 +0200	[thread overview]
Message-ID: <561284B0.4070007@redhat.com> (raw)
In-Reply-To: <CAFEAcA8U07hU-cStrX4oLiWzhNkZS4OrvVXQh1Fm3FTgBHER+A@mail.gmail.com>



On 03/10/2015 00:41, Peter Maydell wrote:
> > What I meant to ask was, do you see any reason for cpu_get_ticks() to exist?
> > If no architecture besides i386 wants to use it, perhaps the code should be
> > moved there.
>
> OTOH various non-x86 things do use the closely related cpu_get_real_ticks(),
> and the implementation of cpu_get_ticks() is very closely related to
> the other clock code in cpus.c.

cpu_get_real_ticks() is returning the host cycle counter;
cpu_get_ticks() is stopping/resuming it when the VM is stopped/resumed.
 In other words, cpu_get_real_ticks() is to cpu_get_ticks() what
QEMU_CLOCK_REALTIME is to QEMU_CLOCK_VIRTUAL.

They are also similar in that both cpu_get_ticks() and
QEMU_CLOCK_VIRTUAL "morph" to the instruction count in icount mode.

cpu_get_ticks() should be the right implementation for the ARM PMCCNTR
cycle counter, since: 1) PMCCNTR is roughly the same as the x86 RDTSC;
2) cpu_get_ticks() is the only monotonically increasing value outside
icount mode.

Paolo

  reply	other threads:[~2015-10-05 14:10 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-04-30 18:14 [Qemu-devel] [RFC 1/5] arm64: Add PMINTENCLR_EL1 Christopher Covington
2015-04-30 18:14 ` [Qemu-devel] [RFC 2/5] arm64: Add PMOVSCLR_EL0 register Christopher Covington
2015-04-30 18:14 ` [Qemu-devel] [RFC 3/5] arm64: Add PMUSERENR_EL0 register Christopher Covington
2015-04-30 18:14 ` [Qemu-devel] [RFC 4/5] arm64: Unmask PMU bits in debug feature register Christopher Covington
2015-04-30 18:14 ` [Qemu-devel] [RFC 5/5] arm: Simplify cycle counter Christopher Covington
2015-04-30 18:27   ` Peter Maydell
2015-04-30 21:33     ` Christopher Covington
2015-04-30 22:02       ` Peter Maydell
2015-05-04  9:54         ` Paolo Bonzini
2015-05-01  1:24   ` Peter Crosthwaite
2015-05-01 14:35     ` Christopher Covington
2015-05-06 14:05       ` Peter Crosthwaite
2015-05-06 15:38         ` Peter Maydell
2015-09-24 19:43   ` [Qemu-devel] [PATCH] target-arm: Use common CPU cycle infrastructure Christopher Covington
2015-09-28 22:05     ` Alistair Francis
2015-09-29 14:07       ` Christopher Covington
2015-10-02 16:44         ` Christopher Covington
2015-10-02 16:56           ` Peter Maydell
2015-10-02 17:25             ` Peter Crosthwaite
2015-10-02 18:08               ` Peter Maydell
2015-10-02 18:14                 ` Peter Crosthwaite
2015-10-02 19:25               ` Christopher Covington
2015-10-02 19:56                 ` Peter Crosthwaite
2015-10-02 20:48                   ` Christopher Covington
2015-10-02 22:41                     ` Peter Maydell
2015-10-05 14:09                       ` Paolo Bonzini [this message]
2015-10-05 14:11                         ` Peter Maydell
2015-10-05 14:27                           ` Paolo Bonzini
2015-10-06 12:49                             ` Peter Maydell
2015-10-06 12:58                               ` Paolo Bonzini
2015-10-06 13:06                                 ` Peter Maydell
2015-10-06 13:10                                   ` Paolo Bonzini
2015-10-13 20:53     ` Peter Maydell
2015-10-14 12:10       ` Christopher Covington

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