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From: Leon Alrae <leon.alrae@imgtec.com>
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Date: Tue, 6 Oct 2015 14:10:14 +0100
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Subject: Re: [Qemu-devel] [PATCH] target-mips: fix updating XContext on mmu
	exception
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To: Yongbok Kim <yongbok.kim@imgtec.com>, qemu-devel@nongnu.org
Cc: aurelien@aurel32.net

On 02/10/15 16:34, Yongbok Kim wrote:
> Correct updating XContext.Region field on mmu exceptions.
> If Config3.CTXTC = 0 then the R filed of XContext has to be updated

s/filed/field

> with the value of bits 63..62 of the virtual address upon a TLB
> exception.
> 
> Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
> ---
>  target-mips/helper.c |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
> 
> diff --git a/target-mips/helper.c b/target-mips/helper.c
> index 01c4461..8ffc990 100644
> --- a/target-mips/helper.c
> +++ b/target-mips/helper.c
> @@ -294,7 +294,7 @@ static void raise_mmu_exception(CPUMIPSState *env, target_ulong address,
>  #if defined(TARGET_MIPS64)
>      env->CP0_EntryHi &= env->SEGMask;
>      env->CP0_XContext = (env->CP0_XContext & ((~0ULL) << (env->SEGBITS - 7))) |
> -                        ((address & 0xC00000000000ULL) >> (55 - env->SEGBITS)) |
> +                        (((address >> 62) & 0x3) << (env->SEGBITS - 9)) |

Did you consider using extract64?

>                          ((address & ((1ULL << env->SEGBITS) - 1) & 0xFFFFFFFFFFFFE000ULL) >> 9);

Care to fix this >80 chars line while you are on this? :)

Thanks,
Leon

>  #endif
>      cs->exception_index = exception;
>