From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758063AbbJIQj3 (ORCPT ); Fri, 9 Oct 2015 12:39:29 -0400 Received: from mail1.bemta7.messagelabs.com ([216.82.254.103]:59263 "EHLO mail1.bemta7.messagelabs.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758041AbbJIQj1 (ORCPT ); Fri, 9 Oct 2015 12:39:27 -0400 X-Env-Sender: Marc_Gonzalez@sigmadesigns.com X-Msg-Ref: server-3.tower-96.messagelabs.com!1444408563!27493380!1 X-Originating-IP: [195.215.56.170] X-StarScan-Received: X-StarScan-Version: 6.13.16; banners=-,-,- X-VirusChecked: Checked Subject: Re: [PATCH v4] clocksource/drivers/tango_xtal: Add new timer for Tango SoCs To: Mans Rullgard CC: Daniel Lezcano , Thomas Gleixner , Mason , LKML , Arnd Bergmann , Rob Herring , Mark Rutland References: <5613E45C.5020208@sigmadesigns.com> <5614549F.2070002@linaro.org> <5614D66A.1060402@sigmadesigns.com> <56150369.2050609@sigmadesigns.com> <561510BF.7050207@linaro.org> <56151B5B.90404@sigmadesigns.com> <56154268.5060700@linaro.org> <56157CB9.7010105@free.fr> <5617AF82.4000606@sigmadesigns.com> <5617C028.3040709@linaro.org> <5617D139.1000103@sigmadesigns.com> <5617E053.8040002@sigmadesigns.com> From: Marc Gonzalez Message-ID: <5617ECF1.7040605@sigmadesigns.com> Date: Fri, 9 Oct 2015 18:36:01 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:41.0) Gecko/20100101 Firefox/41.0 SeaMonkey/2.38 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="ISO-8859-1" Content-Transfer-Encoding: 8bit X-Originating-IP: [172.27.0.114] Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 09/10/2015 18:01, Måns Rullgård wrote: > Marc Gonzalez wrote: > >> Måns Rullgård wrote: >> >>> Marc Gonzalez wrote: >>> >>>> Sigma Designs Tango platforms provide a 27 MHz crystal oscillator. >>>> Use it for clocksource, sched_clock, and delay_timer. >>> >>> Given the nature of this hardware, I think it would make much more sense >>> to support it in a generic fashion. Otherwise the next chip that comes >>> along with a similar counter will result in near duplicate of this >>> "driver", and so on. >> >> I didn't /want/ to write this driver, or rather this "driver" as you put it >> (implying that it is so trivial that I am lame even to submit it). It was >> living happily in arch/arm/clock-tango.c, but Arnd pointed out that such >> code must migrate to drivers/clocksource. >> >> I find your claim that this minimal device (a single register really) should >> be supported in a generic fashion questionable. No one seems to have ever >> needed this, yet it has suddenly become urgent to have it right now? > > Apparently, nobody has needed it before (I can't say for sure that no > existing drivers could be simplified). That doesn't mean that nobody > will need it again. When something can be supported in a generic way, > it is usually a good idea to do that. It saves work in the long term. You snipped this: I would probably have used your driver had it been mainlined. (Also note that your driver doesn't set up the delay timer, which I want.) >> I'm sorry if my mainlining effort is not compatible with your schedule, but >> I've been working on this port for 6 months, and I can't wait a few more >> weeks just because you're not quite ready. (Have you mainstreamed the eth >> and intc driver? I would actually need those.) > > You (Sigma) I am not Sigma, I am Marc. I am a software dev grunt, and I have no influence on recruitment process, business decisions, etc. > had the chance to contract me to help out with this work and > strongly indicated ("we will send you a contract for review by the end > of the week") that you would. Then you backtracked in a rather ugly > manner. I am sorry that you were treated like that :-( > Forgive me if I'm less than motivated to suddenly spend hours > of unpaid time helping you get things in shape. I am just asking that you stop popping up on MLs NAKing each one of my patches. > If you don't want to pay me, you also don't get to set my schedule. Are you referring to the DT changes I've asked you to make? > Besides, you've never > shown any interest whatsoever in upstreaming before, so I really don't > see why it is so urgent for you now. Trying to turn the tables, nice :-) It is urgent because I have been working full-time on this for two months, and I'd like to have results to show for it. (Management is not convinced that upstreaming is a good idea.) If you take a step back, you'll see that I have accepted your input and criticism every time I thought it was warranted, e.g. everything UART related. (And why would I not? It's nice to benefit from great work.) But your claims regarding the clock tree are inaccurate. (I'll address them in a separate message.) Regards.