diff for duplicates of <561F78A4.7060507@citrix.com>

diff --git a/a/1.txt b/N1/1.txt
index 2d70c40..50cc1c4 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -21,12 +21,12 @@ On 15/10/15 09:39, Ian Campbell wrote:
 
 I though about it when I wrote the mail yesterday night.
 
->From the spec section 1.4.3 (ARM IHI 0048B.b):
+From the spec section 1.4.3 (ARM IHI 0048B.b):
 
 "The ARM GIC architecture does not guarantee that a 1-N interrupt is
 presented to:
-? all processors listed in the target processor list
-? an enabled interface, where at least one interface is enabled."
+— all processors listed in the target processor list
+— an enabled interface, where at least one interface is enabled."
 
 AFAIU this paragraph, it means that there is no guarantee to receive an
 interrupt if the target mask contain a vCPU offline.
@@ -41,3 +41,8 @@ Regards,
 
 -- 
 Julien Grall
+
+_______________________________________________
+linux-arm-kernel mailing list
+linux-arm-kernel@lists.infradead.org
+http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
diff --git a/a/content_digest b/N1/content_digest
index d67bcda..c22b198 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,10 +1,13 @@
  "ref\0alpine.DEB.2.02.1510081443100.1179@kaball.uk.xensource.com\0"
  "ref\0561EE3E5.2000105@citrix.com\0"
  "ref\01444898398.1607.18.camel@citrix.com\0"
- "From\0julien.grall@citrix.com (Julien Grall)\0"
- "Subject\0[Xen-devel] xen,arm: enable cpu_hotplug\0"
+ "From\0Julien Grall <julien.grall@citrix.com>\0"
+ "Subject\0Re: [Xen-devel] xen,arm: enable cpu_hotplug\0"
  "Date\0Thu, 15 Oct 2015 10:57:56 +0100\0"
- "To\0linux-arm-kernel@lists.infradead.org\0"
+ "To\0Ian Campbell <ian.campbell@citrix.com>"
+  Stefano Stabellini <stefano.stabellini@eu.citrix.com>
+ " xen-devel@lists.xensource.com\0"
+ "Cc\0linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
  "Hi Ian,\n"
@@ -30,12 +33,12 @@
  "\n"
  "I though about it when I wrote the mail yesterday night.\n"
  "\n"
- ">From the spec section 1.4.3 (ARM IHI 0048B.b):\n"
+ "From the spec section 1.4.3 (ARM IHI 0048B.b):\n"
  "\n"
  "\"The ARM GIC architecture does not guarantee that a 1-N interrupt is\n"
  "presented to:\n"
- "? all processors listed in the target processor list\n"
- "? an enabled interface, where at least one interface is enabled.\"\n"
+ "\342\200\224 all processors listed in the target processor list\n"
+ "\342\200\224 an enabled interface, where at least one interface is enabled.\"\n"
  "\n"
  "AFAIU this paragraph, it means that there is no guarantee to receive an\n"
  "interrupt if the target mask contain a vCPU offline.\n"
@@ -49,6 +52,11 @@
  "Regards,\n"
  "\n"
  "-- \n"
- Julien Grall
+ "Julien Grall\n"
+ "\n"
+ "_______________________________________________\n"
+ "linux-arm-kernel mailing list\n"
+ "linux-arm-kernel@lists.infradead.org\n"
+ http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
 
-cb9e638625c4823e6a3ff3aecd96c7f1c780e1c5189ef9ee09afaa3d2f498eaa
+f6568340ab4dc77d55086d556ae910b09684878a9b613ee12b6bb4a7d78e93ff
