From mboxrd@z Thu Jan 1 00:00:00 1970 From: julien.grall@citrix.com (Julien Grall) Date: Thu, 15 Oct 2015 10:57:56 +0100 Subject: [Xen-devel] xen,arm: enable cpu_hotplug In-Reply-To: <1444898398.1607.18.camel@citrix.com> References: <561EE3E5.2000105@citrix.com> <1444898398.1607.18.camel@citrix.com> Message-ID: <561F78A4.7060507@citrix.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hi Ian, On 15/10/15 09:39, Ian Campbell wrote: > On Thu, 2015-10-15 at 00:23 +0100, Julien Grall wrote: >> My second point is related to how Xen is handling interrupt with vCPU. >> When PSCI off is called, we will set the _VFP_down flag. This flag is >> used in vgic_vcpu_inject_irq and when it's set the interrupt will be >> ignored and stay active on the HW GIC forever. If the vCPU is coming >> back online, this interrupt will never be received. AFAIU the spec, the >> interrupt is expected to stay pending on the distributor side and will >> be receive when the vCPU will come back or migrate to another vCPU. A >> similar problem can happen when the vCPU is powered on again because we >> clear all the interrupt state related to vCPU (see >> vgic_clear_pending_irqs). > > Is there also an interaction with our implementation of ITARGETSR of > picking the lowest set bit? e.g. if an IRQ has target 0x6 (targeting CPU 1 > and CPU2) we will choose CPU 1. If CPU 1 is then unplugged, will we end up > targeting CPU 2 or the now-offline CPU 1? In the latter case the lack of > interrupts might be considered surprising? I though about it when I wrote the mail yesterday night. >>From the spec section 1.4.3 (ARM IHI 0048B.b): "The ARM GIC architecture does not guarantee that a 1-N interrupt is presented to: ? all processors listed in the target processor list ? an enabled interface, where at least one interface is enabled." AFAIU this paragraph, it means that there is no guarantee to receive an interrupt if the target mask contain a vCPU offline. > Or maybe the way CPU hotplug is arranged we never end up with holes in the > online cpu space, i.e it is not possible to take down CPU1 and leave CPU2 > up? A kernel is allowed to hotplug any vCPU. Regards, -- Julien Grall From mboxrd@z Thu Jan 1 00:00:00 1970 From: Julien Grall Subject: Re: [Xen-devel] xen,arm: enable cpu_hotplug Date: Thu, 15 Oct 2015 10:57:56 +0100 Message-ID: <561F78A4.7060507@citrix.com> References: <561EE3E5.2000105@citrix.com> <1444898398.1607.18.camel@citrix.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <1444898398.1607.18.camel@citrix.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Ian Campbell , Stefano Stabellini , xen-devel@lists.xensource.com Cc: linux-arm-kernel@lists.infradead.org List-Id: xen-devel@lists.xenproject.org SGkgSWFuLAoKT24gMTUvMTAvMTUgMDk6MzksIElhbiBDYW1wYmVsbCB3cm90ZToKPiBPbiBUaHUs IDIwMTUtMTAtMTUgYXQgMDA6MjMgKzAxMDAsIEp1bGllbiBHcmFsbCB3cm90ZToKPj4gTXkgc2Vj b25kIHBvaW50IGlzIHJlbGF0ZWQgdG8gaG93IFhlbiBpcyBoYW5kbGluZyBpbnRlcnJ1cHQgd2l0 aCB2Q1BVLiAKPj4gV2hlbiBQU0NJIG9mZiBpcyBjYWxsZWQsIHdlIHdpbGwgc2V0IHRoZSBfVkZQ X2Rvd24gZmxhZy4gVGhpcyBmbGFnIGlzIAo+PiB1c2VkIGluIHZnaWNfdmNwdV9pbmplY3RfaXJx IGFuZCB3aGVuIGl0J3Mgc2V0IHRoZSBpbnRlcnJ1cHQgd2lsbCBiZSAKPj4gaWdub3JlZCBhbmQg c3RheSBhY3RpdmUgb24gdGhlIEhXIEdJQyBmb3JldmVyLiBJZiB0aGUgdkNQVSBpcyBjb21pbmcg Cj4+IGJhY2sgb25saW5lLCB0aGlzIGludGVycnVwdCB3aWxsIG5ldmVyIGJlIHJlY2VpdmVkLiBB RkFJVSB0aGUgc3BlYywgdGhlIAo+PiBpbnRlcnJ1cHQgaXMgZXhwZWN0ZWQgdG8gc3RheSBwZW5k aW5nIG9uIHRoZSBkaXN0cmlidXRvciBzaWRlIGFuZCB3aWxsIAo+PiBiZSByZWNlaXZlIHdoZW4g dGhlIHZDUFUgd2lsbCBjb21lIGJhY2sgb3IgbWlncmF0ZSB0byBhbm90aGVyIHZDUFUuIEEgCj4+ IHNpbWlsYXIgcHJvYmxlbSBjYW4gaGFwcGVuIHdoZW4gdGhlIHZDUFUgaXMgcG93ZXJlZCBvbiBh Z2FpbiBiZWNhdXNlIHdlIAo+PiBjbGVhciBhbGwgdGhlIGludGVycnVwdCBzdGF0ZSByZWxhdGVk IHRvIHZDUFUgKHNlZQo+PiB2Z2ljX2NsZWFyX3BlbmRpbmdfaXJxcykuCj4gCj4gSXMgdGhlcmUg YWxzbyBhbiBpbnRlcmFjdGlvbiB3aXRoIG91ciBpbXBsZW1lbnRhdGlvbiBvZiBJVEFSR0VUU1Ig b2YKPiBwaWNraW5nIHRoZSBsb3dlc3Qgc2V0IGJpdD8gZS5nLiBpZiBhbiBJUlEgaGFzIHRhcmdl dCAweDYgKHRhcmdldGluZyBDUFUgMQo+IGFuZCBDUFUyKSB3ZSB3aWxsIGNob29zZSBDUFUgMS4g SWYgQ1BVIDEgaXMgdGhlbiB1bnBsdWdnZWQsIHdpbGwgd2UgZW5kIHVwCj4gdGFyZ2V0aW5nIENQ VSAyIG9yIHRoZSBub3ctb2ZmbGluZSBDUFUgMT8gSW4gdGhlIGxhdHRlciBjYXNlIHRoZSBsYWNr IG9mCj4gaW50ZXJydXB0cyBtaWdodCBiZSBjb25zaWRlcmVkIHN1cnByaXNpbmc/CgpJIHRob3Vn aCBhYm91dCBpdCB3aGVuIEkgd3JvdGUgdGhlIG1haWwgeWVzdGVyZGF5IG5pZ2h0LgoKRnJvbSB0 aGUgc3BlYyBzZWN0aW9uIDEuNC4zIChBUk0gSUhJIDAwNDhCLmIpOgoKIlRoZSBBUk0gR0lDIGFy Y2hpdGVjdHVyZSBkb2VzIG5vdCBndWFyYW50ZWUgdGhhdCBhIDEtTiBpbnRlcnJ1cHQgaXMKcHJl c2VudGVkIHRvOgrigJQgYWxsIHByb2Nlc3NvcnMgbGlzdGVkIGluIHRoZSB0YXJnZXQgcHJvY2Vz c29yIGxpc3QK4oCUIGFuIGVuYWJsZWQgaW50ZXJmYWNlLCB3aGVyZSBhdCBsZWFzdCBvbmUgaW50 ZXJmYWNlIGlzIGVuYWJsZWQuIgoKQUZBSVUgdGhpcyBwYXJhZ3JhcGgsIGl0IG1lYW5zIHRoYXQg dGhlcmUgaXMgbm8gZ3VhcmFudGVlIHRvIHJlY2VpdmUgYW4KaW50ZXJydXB0IGlmIHRoZSB0YXJn ZXQgbWFzayBjb250YWluIGEgdkNQVSBvZmZsaW5lLgoKPiBPciBtYXliZSB0aGUgd2F5IENQVSBo b3RwbHVnIGlzIGFycmFuZ2VkIHdlIG5ldmVyIGVuZCB1cCB3aXRoIGhvbGVzIGluIHRoZQo+IG9u bGluZSBjcHUgc3BhY2UsIGkuZSBpdCBpcyBub3QgcG9zc2libGUgdG8gdGFrZSBkb3duIENQVTEg YW5kIGxlYXZlIENQVTIKPiB1cD8KCkEga2VybmVsIGlzIGFsbG93ZWQgdG8gaG90cGx1ZyBhbnkg dkNQVS4KClJlZ2FyZHMsCgotLSAKSnVsaWVuIEdyYWxsCgpfX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fXwpsaW51eC1hcm0ta2VybmVsIG1haWxpbmcgbGlzdAps aW51eC1hcm0ta2VybmVsQGxpc3RzLmluZnJhZGVhZC5vcmcKaHR0cDovL2xpc3RzLmluZnJhZGVh ZC5vcmcvbWFpbG1hbi9saXN0aW5mby9saW51eC1hcm0ta2VybmVsCg==