diff for duplicates of <561F7EFE.5070908@mleia.com> diff --git a/a/1.txt b/N1/1.txt index f3fda9a..e0ab8af 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -3,7 +3,7 @@ Hi Joachim, On 14.10.2015 21:04, Joachim Eastwood wrote: > Hi Vladimir, > -> On 13 October 2015 at 01:54, Vladimir Zapolskiy <vz@mleia.com> wrote: +> On 13 October 2015 at 01:54, Vladimir Zapolskiy <vz-ChpfBGZJDbMAvxtiuMwx3w@public.gmane.org> wrote: >> LPC32xx SoCs have two independent PWM controllers, they have different >> clock parents, clock gates and even slightly different controls, >> each of these two PWM controllers has one output channel. Due to @@ -12,7 +12,7 @@ On 14.10.2015 21:04, Joachim Eastwood wrote: >> in lpc32xx.dtsi, which at the moment prevents separate configuration >> of different clock parents and gates for both PWM controllers. >> ->> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> +>> Signed-off-by: Vladimir Zapolskiy <vz-ChpfBGZJDbMAvxtiuMwx3w@public.gmane.org> >> --- >> arch/arm/boot/dts/lpc32xx.dtsi | 10 ++++++++-- >> 1 file changed, 8 insertions(+), 2 deletions(-) @@ -25,15 +25,15 @@ On 14.10.2015 21:04, Joachim Eastwood wrote: >> status = "disabled"; >> }; >> ->> - pwm: pwm at 4005C000 { ->> + pwm1: pwm at 4005C000 { +>> - pwm: pwm@4005C000 { +>> + pwm1: pwm@4005C000 { >> compatible = "nxp,lpc3220-pwm"; >> - reg = <0x4005C000 0x8>; >> + reg = <0x4005C000 0x4>; >> + status = "disabled"; >> + }; >> + ->> + pwm2: pwm at 4005C004 { +>> + pwm2: pwm@4005C004 { >> + compatible = "nxp,lpc3220-pwm"; >> + reg = <0x4005C004 0x4>; >> status = "disabled"; @@ -43,7 +43,7 @@ On 14.10.2015 21:04, Joachim Eastwood wrote: > I am not really against your change, but... > > What's wrong with a binding like the one below? -> pwm: pwm at 0x4005c000 { +> pwm: pwm@0x4005c000 { > compatible = "nxp,lpc3220-pwm"; > reg = <0x4005C000 0x8>; > clocks =<&clk CLK_PWM1, &clk CLK_PWM2>; @@ -75,3 +75,7 @@ Thanks for review. -- With best wishes, Vladimir +-- +To unsubscribe from this list: send the line "unsubscribe devicetree" in +the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org +More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/a/content_digest b/N1/content_digest index 77177e6..655346d 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,10 +1,18 @@ "ref\01444694045-22000-1-git-send-email-vz@mleia.com\0" "ref\01444694045-22000-6-git-send-email-vz@mleia.com\0" "ref\0CAGhQ9Vx9ghfAD0=ntsFL50+iBQDag=HHGb6=X2-AfYPtSb_-yQ@mail.gmail.com\0" - "From\0vz@mleia.com (Vladimir Zapolskiy)\0" - "Subject\0[PATCH 5/5] arm: dts: lpc32xx: add device node for the second pwm controller\0" + "ref\0CAGhQ9Vx9ghfAD0=ntsFL50+iBQDag=HHGb6=X2-AfYPtSb_-yQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org\0" + "From\0Vladimir Zapolskiy <vz-ChpfBGZJDbMAvxtiuMwx3w@public.gmane.org>\0" + "Subject\0Re: [PATCH 5/5] arm: dts: lpc32xx: add device node for the second pwm controller\0" "Date\0Thu, 15 Oct 2015 13:25:02 +0300\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0Joachim Eastwood <manabian-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\0" + "Cc\0Roland Stigge <stigge-uj/7R2tJ6VmzQB+pC5nmwQ@public.gmane.org>" + Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org> + Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org> + Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> + Grant Likely <grant.likely-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> + devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + " linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>\0" "\00:1\0" "b\0" "Hi Joachim,\n" @@ -12,7 +20,7 @@ "On 14.10.2015 21:04, Joachim Eastwood wrote:\n" "> Hi Vladimir,\n" "> \n" - "> On 13 October 2015 at 01:54, Vladimir Zapolskiy <vz@mleia.com> wrote:\n" + "> On 13 October 2015 at 01:54, Vladimir Zapolskiy <vz-ChpfBGZJDbMAvxtiuMwx3w@public.gmane.org> wrote:\n" ">> LPC32xx SoCs have two independent PWM controllers, they have different\n" ">> clock parents, clock gates and even slightly different controls,\n" ">> each of these two PWM controllers has one output channel. Due to\n" @@ -21,7 +29,7 @@ ">> in lpc32xx.dtsi, which at the moment prevents separate configuration\n" ">> of different clock parents and gates for both PWM controllers.\n" ">>\n" - ">> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>\n" + ">> Signed-off-by: Vladimir Zapolskiy <vz-ChpfBGZJDbMAvxtiuMwx3w@public.gmane.org>\n" ">> ---\n" ">> arch/arm/boot/dts/lpc32xx.dtsi | 10 ++++++++--\n" ">> 1 file changed, 8 insertions(+), 2 deletions(-)\n" @@ -34,15 +42,15 @@ ">> status = \"disabled\";\n" ">> };\n" ">>\n" - ">> - pwm: pwm at 4005C000 {\n" - ">> + pwm1: pwm at 4005C000 {\n" + ">> - pwm: pwm@4005C000 {\n" + ">> + pwm1: pwm@4005C000 {\n" ">> compatible = \"nxp,lpc3220-pwm\";\n" ">> - reg = <0x4005C000 0x8>;\n" ">> + reg = <0x4005C000 0x4>;\n" ">> + status = \"disabled\";\n" ">> + };\n" ">> +\n" - ">> + pwm2: pwm at 4005C004 {\n" + ">> + pwm2: pwm@4005C004 {\n" ">> + compatible = \"nxp,lpc3220-pwm\";\n" ">> + reg = <0x4005C004 0x4>;\n" ">> status = \"disabled\";\n" @@ -52,7 +60,7 @@ "> I am not really against your change, but...\n" "> \n" "> What's wrong with a binding like the one below?\n" - "> pwm: pwm at 0x4005c000 {\n" + "> pwm: pwm@0x4005c000 {\n" "> compatible = \"nxp,lpc3220-pwm\";\n" "> reg = <0x4005C000 0x8>;\n" "> clocks =<&clk CLK_PWM1, &clk CLK_PWM2>;\n" @@ -83,6 +91,10 @@ "\n" "--\n" "With best wishes,\n" - Vladimir + "Vladimir\n" + "--\n" + "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n" + "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n" + More majordomo info at http://vger.kernel.org/majordomo-info.html -383abd192cf2692672f3dc7196c85982af6a44939b87775836033faaeca44c63 +68227bd9aa4abe0f6892afd48261f8719feedf5836ef23e8c20936733dbd0974
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