From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50373) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Zn1na-0002Qq-B8 for qemu-devel@nongnu.org; Fri, 16 Oct 2015 05:59:43 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Zn1nW-0004cP-PU for qemu-devel@nongnu.org; Fri, 16 Oct 2015 05:59:41 -0400 Received: from mx1.redhat.com ([209.132.183.28]:46824) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Zn1nW-0004cB-Jy for qemu-devel@nongnu.org; Fri, 16 Oct 2015 05:59:38 -0400 References: <1444683308-30543-1-git-send-email-agordeev@redhat.com> <20151013063057.GA32581@agordeev.usersys.redhat.com> <20151013124837.GA27387@agordeev.usersys.redhat.com> <561CFD65.40407@redhat.com> <20151013160109-mutt-send-email-mst@redhat.com> <20151013161751-mutt-send-email-mst@redhat.com> <5620BAB0.7050906@redhat.com> From: Laurent Vivier Message-ID: <5620CA87.7060204@redhat.com> Date: Fri, 16 Oct 2015 11:59:35 +0200 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH] hw/arm/virt: Allow zero address for PCI IO space List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: Andrew Jones , Alexander Gordeev , QEMU Developers , "Michael S. Tsirkin" On 16/10/2015 11:32, Peter Maydell wrote: > On 16 October 2015 at 09:52, Laurent Vivier wrote: >> I'm going to remove the zero address checking and try to start a qemu >> for each of them to see which ones are broken. > > You need to also make sure there's a PCI card in there > and that the guest maps it with a BAR at address zero > (testing both MMIO BARs and IO BARs), and then exercise > the guest sufficiently to check that behaviour of whatever > it might be overlapping is still OK. I think it will be hard to trigger this case. :( For instance, on pseries, the card is put at address 0 only when it is hotplugged, and on reboot it is moved to another address. > You might find it easier to do by code inspection in > some cases (boards which implement PCI as a simple > "memory window into the PCI space" rather than with > x86-style "anything in the background not covered by > another device is PCI space" should be ok). OK, I will... Laurent