From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41737) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZoEU2-0003RZ-Mj for qemu-devel@nongnu.org; Mon, 19 Oct 2015 13:44:31 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZoETy-00067Y-Ts for qemu-devel@nongnu.org; Mon, 19 Oct 2015 13:44:30 -0400 Received: from mail-qg0-x231.google.com ([2607:f8b0:400d:c04::231]:35477) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZoETy-00067Q-Pd for qemu-devel@nongnu.org; Mon, 19 Oct 2015 13:44:26 -0400 Received: by qgbb65 with SMTP id b65so59126294qgb.2 for ; Mon, 19 Oct 2015 10:44:26 -0700 (PDT) Sender: Richard Henderson References: <1445276410-5031-1-git-send-email-ehabkost@redhat.com> <1445276410-5031-4-git-send-email-ehabkost@redhat.com> From: Richard Henderson Message-ID: <56252BF5.7030006@twiddle.net> Date: Mon, 19 Oct 2015 07:44:21 -1000 MIME-Version: 1.0 In-Reply-To: <1445276410-5031-4-git-send-email-ehabkost@redhat.com> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v3 3/9] target-i386: Ensure bit 10 on DR7 is never cleared List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Eduardo Habkost , qemu-devel@nongnu.org, Paolo Bonzini On 10/19/2015 07:40 AM, Eduardo Habkost wrote: > Bit 10 of DR7 is documented as always set to 1, so ensure that's > always the case. > > Signed-off-by: Eduardo Habkost > --- > Changes series v2 -> series v3: > * Set bit on new_dr7, so that it can still pass the xor test > for the enable bits optimization > * Suggested-by: Richard Henderson > --- > target-i386/bpt_helper.c | 2 ++ > 1 file changed, 2 insertions(+) Reviewed-by: Richard Henderson r~